{"id":"https://openalex.org/W2339652988","doi":"https://doi.org/10.1007/3-540-11980-9_21","title":"Hardware algorithms and logic design automation","display_name":"Hardware algorithms and logic design automation","publication_year":1983,"publication_date":"1983-01-01","ids":{"openalex":"https://openalex.org/W2339652988","doi":"https://doi.org/10.1007/3-540-11980-9_21","mag":"2339652988"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-11980-9_21","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-11980-9_21","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054859202","display_name":"Shuzo Yajima","orcid":null},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Shuzo Yajima","raw_affiliation_strings":["Department of Information Science Faculty of Engineering, Kyoto University, 606, Kyoto, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Information Science Faculty of Engineering, Kyoto University, 606, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090230648","display_name":"Hiroto Yasuura","orcid":"https://orcid.org/0000-0002-8387-5405"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroto Yasuura","raw_affiliation_strings":["Department of Information Science Faculty of Engineering, Kyoto University, 606, Kyoto, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Information Science Faculty of Engineering, Kyoto University, 606, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5054859202"],"corresponding_institution_ids":["https://openalex.org/I22299242"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.24161074,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"147","last_page":"164"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7740576267242432},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.6203530430793762},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5332260727882385},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5049813389778137},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.48920702934265137},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.48452824354171753},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4536031484603882},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.41788172721862793},{"id":"https://openalex.org/keywords/computer-automated-design","display_name":"Computer-automated design","score":0.41431787610054016},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.41154131293296814},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4051961302757263},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.39570915699005127},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.347761869430542},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3246639370918274},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.280429482460022},{"id":"https://openalex.org/keywords/systems-design","display_name":"Systems design","score":0.27347660064697266},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.272671103477478},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2709249258041382},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.25649014115333557},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07833507657051086}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7740576267242432},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.6203530430793762},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5332260727882385},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5049813389778137},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.48920702934265137},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.48452824354171753},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4536031484603882},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.41788172721862793},{"id":"https://openalex.org/C205976826","wikidata":"https://www.wikidata.org/wiki/Q5157390","display_name":"Computer-automated design","level":3,"score":0.41431787610054016},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.41154131293296814},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4051961302757263},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.39570915699005127},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.347761869430542},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3246639370918274},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.280429482460022},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.27347660064697266},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.272671103477478},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2709249258041382},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.25649014115333557},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07833507657051086},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-11980-9_21","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-11980-9_21","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W30540897","https://openalex.org/W166624952","https://openalex.org/W1533538517","https://openalex.org/W1586380695","https://openalex.org/W1655990431","https://openalex.org/W1666015432","https://openalex.org/W1966633212","https://openalex.org/W1967575124","https://openalex.org/W1967852903","https://openalex.org/W1973802654","https://openalex.org/W1983849809","https://openalex.org/W1989650529","https://openalex.org/W2005874499","https://openalex.org/W2007280161","https://openalex.org/W2028822977","https://openalex.org/W2034363187","https://openalex.org/W2046035774","https://openalex.org/W2064687921","https://openalex.org/W2066104460","https://openalex.org/W2067002313","https://openalex.org/W2068071786","https://openalex.org/W2074747378","https://openalex.org/W2081601485","https://openalex.org/W2107945774","https://openalex.org/W2112637319","https://openalex.org/W2165495918","https://openalex.org/W4235424819","https://openalex.org/W4238085582","https://openalex.org/W6631841456","https://openalex.org/W6637190722","https://openalex.org/W6637413124","https://openalex.org/W6759134286"],"related_works":["https://openalex.org/W1494561250","https://openalex.org/W2136813515","https://openalex.org/W2077986289","https://openalex.org/W4251160711","https://openalex.org/W4389491860","https://openalex.org/W11556496","https://openalex.org/W4231839681","https://openalex.org/W2121232025","https://openalex.org/W2161167665","https://openalex.org/W1999759102"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}