{"id":"https://openalex.org/W2041977755","doi":"https://doi.org/10.1002/cta.4490200306","title":"Automation of the ic layout of continuous\u2010time transconductance\u2010capacitor filters","display_name":"Automation of the ic layout of continuous\u2010time transconductance\u2010capacitor filters","publication_year":1992,"publication_date":"1992-05-01","ids":{"openalex":"https://openalex.org/W2041977755","doi":"https://doi.org/10.1002/cta.4490200306","mag":"2041977755"},"language":"en","primary_location":{"id":"doi:10.1002/cta.4490200306","is_oa":false,"landing_page_url":"https://doi.org/10.1002/cta.4490200306","pdf_url":null,"source":{"id":"https://openalex.org/S92132303","display_name":"International Journal of Circuit Theory and Applications","issn_l":"0098-9886","issn":["0098-9886","1097-007X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Circuit Theory and Applications","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5001994622","display_name":"W.R. Daasch","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"W. Robert Daasch","raw_affiliation_strings":["Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012998838","display_name":"M. Wedlake","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Martine Wedlake","raw_affiliation_strings":["Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031914763","display_name":"R. Schaumann","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rolf Schaumann","raw_affiliation_strings":["Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111572975","display_name":"Pan Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pan Wu","raw_affiliation_strings":["Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Portland State University, Portland, OR 97207, U.S.A","institution_ids":["https://openalex.org/I126345244"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I126345244"],"apc_list":{"value":2780,"currency":"USD","value_usd":2780},"apc_paid":null,"fwci":1.6854,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.82927376,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":"3","first_page":"267","last_page":"282"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.677498996257782},{"id":"https://openalex.org/keywords/transconductance","display_name":"Transconductance","score":0.6476761102676392},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6287689805030823},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5982106328010559},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5772314667701721},{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"Parasitic extraction","score":0.5695087313652039},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5346891283988953},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4753698706626892},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4270322024822235},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.41696053743362427},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3252685070037842},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3000839948654175},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28720617294311523},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.13899186253547668}],"concepts":[{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.677498996257782},{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.6476761102676392},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6287689805030823},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5982106328010559},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5772314667701721},{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.5695087313652039},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5346891283988953},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4753698706626892},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4270322024822235},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.41696053743362427},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3252685070037842},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3000839948654175},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28720617294311523},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.13899186253547668},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1002/cta.4490200306","is_oa":false,"landing_page_url":"https://doi.org/10.1002/cta.4490200306","pdf_url":null,"source":{"id":"https://openalex.org/S92132303","display_name":"International Journal of Circuit Theory and Applications","issn_l":"0098-9886","issn":["0098-9886","1097-007X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Circuit Theory and Applications","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320309493","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W625930853","https://openalex.org/W1538638404","https://openalex.org/W1548672795","https://openalex.org/W1563585604","https://openalex.org/W1689961043","https://openalex.org/W1740797796","https://openalex.org/W1984651520","https://openalex.org/W1987373409","https://openalex.org/W1994218207","https://openalex.org/W1994741804","https://openalex.org/W1997252335","https://openalex.org/W1999357165","https://openalex.org/W2026626437","https://openalex.org/W2041562960","https://openalex.org/W2044044092","https://openalex.org/W2080224144","https://openalex.org/W2090774190","https://openalex.org/W2109998306","https://openalex.org/W2110197541","https://openalex.org/W2118458628","https://openalex.org/W2120889849","https://openalex.org/W2126414520","https://openalex.org/W2126556046","https://openalex.org/W2128887768","https://openalex.org/W2133560216","https://openalex.org/W2134458360","https://openalex.org/W2134977951","https://openalex.org/W2143559192","https://openalex.org/W2144821543","https://openalex.org/W2146385123","https://openalex.org/W2146519106","https://openalex.org/W2150158987","https://openalex.org/W2152497643","https://openalex.org/W2155311432","https://openalex.org/W2158070728","https://openalex.org/W2165061516","https://openalex.org/W2167588382","https://openalex.org/W2169868332","https://openalex.org/W2170627852","https://openalex.org/W2189061981","https://openalex.org/W3022699844","https://openalex.org/W4244342945"],"related_works":["https://openalex.org/W1905216755","https://openalex.org/W2548900738","https://openalex.org/W2117417104","https://openalex.org/W364790928","https://openalex.org/W2534619547","https://openalex.org/W1923048618","https://openalex.org/W2024541028","https://openalex.org/W2104218257","https://openalex.org/W2039352565","https://openalex.org/W2051886008"],"abstract_inverted_index":{"Abstract":[0],"To":[1],"exploit":[2],"the":[3,20,27,46,59,64,79,107,125],"increased":[4],"circuit":[5],"density":[6],"available":[7],"in":[8,35,97],"current":[9],"technologies":[10],"for":[11,106,139],"continuous\u2010time":[12],"(c\u2010t)":[13],"systems,":[14],"it":[15],"is":[16,48,82],"proposed":[17],"to":[18,26,43,84,95,123],"extend":[19],"range":[21],"of":[22,63,66,76,88,109,117,127],"analogue":[23],"design":[24,68],"automation":[25,69,108],"larger":[28],"c\u2010t":[29,110,119],"subsystems,":[30],"specifically":[31],"filters,":[32],"commonly":[33],"found":[34],"communications,":[36],"mass":[37],"storage":[38],"devices":[39],"and":[40,55,70,131,141],"other":[41],"interfaces":[42],"real\u2010world":[44],"signals.":[45],"synthesis":[47],"based":[49],"onLCladder":[50],"simulation":[51],"using":[52],"only":[53],"transconductances":[54],"grounded":[56],"capacitors":[57],"(TGC).":[58],"method":[60],"retains":[61],"many":[62],"characteristics":[65],"digital":[67],"therefore":[71],"allows":[72],"a":[73,86],"direct":[74],"mapping":[75],"these":[77],"techniques.":[78],"TGC":[80],"approach":[81],"shown":[83],"require":[85],"minimum":[87],"component":[89],"types":[90],"which":[91],"are":[92,121,136],"ideally":[93],"suited":[94],"integration":[96],"MOS,":[98],"bipolar":[99],"or":[100],"GaAs":[101],"technologies.":[102],"A":[103],"simple":[104],"example":[105],"filter":[111],"designs":[112],"as":[113,115],"well":[114],"results":[116],"CMOS":[118],"filters":[120],"included":[122],"demonstrate":[124],"viability":[126],"this":[128],"approach.":[129],"Related":[130],"equally":[132],"important":[133],"areas":[134],"addressed":[135],"tuning,":[137],"compensation":[138],"parasitics":[140],"scaling.":[142]},"counts_by_year":[],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}