{"id":"https://openalex.org/W2033631420","doi":"https://doi.org/10.1002/scj.4690221103","title":"Method of diagnosing multiple stuck\u2010at\u2010faults in combinational circuits","display_name":"Method of diagnosing multiple stuck\u2010at\u2010faults in combinational circuits","publication_year":1991,"publication_date":"1991-01-01","ids":{"openalex":"https://openalex.org/W2033631420","doi":"https://doi.org/10.1002/scj.4690221103","mag":"2033631420"},"language":"en","primary_location":{"id":"doi:10.1002/scj.4690221103","is_oa":false,"landing_page_url":"https://doi.org/10.1002/scj.4690221103","pdf_url":null,"source":{"id":"https://openalex.org/S58208175","display_name":"Systems and Computers in Japan","issn_l":"0882-1666","issn":["0882-1666","1520-684X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Systems and Computers in Japan","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084876589","display_name":"Teruhiko Yamada","orcid":null},"institutions":[{"id":"https://openalex.org/I16718484","display_name":"Hess (United States)","ror":"https://ror.org/00zbk1w77","country_code":"US","type":"company","lineage":["https://openalex.org/I16718484"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Teruhiko Yamada","raw_affiliation_strings":["Teruhiko Yamada obtained a B.S. in Electrical Engineering from Himeji Institute of Technology in 1969 and an M.S. from Kyoto University in 1971. He joined Central Research Laboratory of NEC (Inc.) in 1971. He also has a Ph.D. In 1986 he became an Associate Professor on the Faculty of Engineering of Meiji University. Since 1989 he has been an Associate Professor at the School of Sciences and Engineering, Meiji University. He has been working in the areas of logic circuit testing and LSI-CAD. He is the author of the book Theory of Logic Circuit (Morikita Publishing). He is a member of IEEE and of the Information Processing Society"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Teruhiko Yamada obtained a B.S. in Electrical Engineering from Himeji Institute of Technology in 1969 and an M.S. from Kyoto University in 1971. He joined Central Research Laboratory of NEC (Inc.) in 1971. He also has a Ph.D. In 1986 he became an Associate Professor on the Faculty of Engineering of Meiji University. Since 1989 he has been an Associate Professor at the School of Sciences and Engineering, Meiji University. He has been working in the areas of logic circuit testing and LSI-CAD. He is the author of the book Theory of Logic Circuit (Morikita Publishing). He is a member of IEEE and of the Information Processing Society","institution_ids":["https://openalex.org/I16718484"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021614612","display_name":"Shuji Hamada","orcid":null},"institutions":[{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shuji Hamada","raw_affiliation_strings":["Shuji Hamada obtained a B.S. in Electronic Communication Engineering in 1988 and an M.S. in, 1990 from Meiji University. In 1990 he joined Fujitsu (Inc.). While at Meiji University, he worked on LSI fault diagnosis"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shuji Hamada obtained a B.S. in Electronic Communication Engineering in 1988 and an M.S. in, 1990 from Meiji University. In 1990 he joined Fujitsu (Inc.). While at Meiji University, he worked on LSI fault diagnosis","institution_ids":["https://openalex.org/I16656306"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027474291","display_name":"Tatsuo Matsumoto","orcid":null},"institutions":[{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Tatsuo Matsumoto","raw_affiliation_strings":["Tatsuo Matsumoto obtained a B.S. in Electronic Communications Engineering from Meiji University in 1990. He joined Toshiba (Inc.) in 1990. While at Meiji University, he worked on LSI fault diagnosis"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tatsuo Matsumoto obtained a B.S. in Electronic Communications Engineering from Meiji University in 1990. He joined Toshiba (Inc.) in 1990. While at Meiji University, he worked on LSI fault diagnosis","institution_ids":["https://openalex.org/I16656306"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112679671","display_name":"Toshihiko Takahashi","orcid":null},"institutions":[{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toshihiko Takahashi","raw_affiliation_strings":["Shuji Hamada obtained a B.S. in Electronic Communication Engineering in 1988 and an M.S. in 1990 from Meiji University. In 1990 he joined Fujitsu (Inc.). While at Meiji University, he worked on LSI fault diagnosis"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shuji Hamada obtained a B.S. in Electronic Communication Engineering in 1988 and an M.S. in 1990 from Meiji University. In 1990 he joined Fujitsu (Inc.). While at Meiji University, he worked on LSI fault diagnosis","institution_ids":["https://openalex.org/I16656306"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080808336","display_name":"Takao Nakayama","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Takao Nakayama","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.14429698,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":"22","issue":"11","first_page":"21","last_page":"30"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7696850299835205},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6279997825622559},{"id":"https://openalex.org/keywords/turnaround-time","display_name":"Turnaround time","score":0.6202759742736816},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5917520523071289},{"id":"https://openalex.org/keywords/preprocessor","display_name":"Preprocessor","score":0.5844606161117554},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5715394020080566},{"id":"https://openalex.org/keywords/medical-diagnosis","display_name":"Medical diagnosis","score":0.567048966884613},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5526066422462463},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4886317849159241},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.480885773897171},{"id":"https://openalex.org/keywords/resolution","display_name":"Resolution (logic)","score":0.4805324673652649},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.44613295793533325},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.22931337356567383},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.14454060792922974},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12966176867485046},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11626020073890686}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7696850299835205},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6279997825622559},{"id":"https://openalex.org/C176553487","wikidata":"https://www.wikidata.org/wiki/Q7855819","display_name":"Turnaround time","level":2,"score":0.6202759742736816},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5917520523071289},{"id":"https://openalex.org/C34736171","wikidata":"https://www.wikidata.org/wiki/Q918333","display_name":"Preprocessor","level":2,"score":0.5844606161117554},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5715394020080566},{"id":"https://openalex.org/C534262118","wikidata":"https://www.wikidata.org/wiki/Q177719","display_name":"Medical diagnosis","level":2,"score":0.567048966884613},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5526066422462463},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4886317849159241},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.480885773897171},{"id":"https://openalex.org/C138268822","wikidata":"https://www.wikidata.org/wiki/Q1051925","display_name":"Resolution (logic)","level":2,"score":0.4805324673652649},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.44613295793533325},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.22931337356567383},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.14454060792922974},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12966176867485046},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11626020073890686},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1002/scj.4690221103","is_oa":false,"landing_page_url":"https://doi.org/10.1002/scj.4690221103","pdf_url":null,"source":{"id":"https://openalex.org/S58208175","display_name":"Systems and Computers in Japan","issn_l":"0882-1666","issn":["0882-1666","1520-684X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Systems and Computers in Japan","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2001482367","https://openalex.org/W2044741679","https://openalex.org/W2149910123","https://openalex.org/W2173124859","https://openalex.org/W2796880069","https://openalex.org/W4233482225"],"related_works":["https://openalex.org/W2069145203","https://openalex.org/W1702800398","https://openalex.org/W2085176210","https://openalex.org/W2106889348","https://openalex.org/W2083793411","https://openalex.org/W2135500595","https://openalex.org/W2543766998","https://openalex.org/W573124066","https://openalex.org/W1969171031","https://openalex.org/W1592424226"],"abstract_inverted_index":{"Abstract":[0],"To":[1],"reduce":[2,91],"VLSI":[3],"turnaround":[4],"time":[5],"and":[6,96],"cost,":[7],"an":[8],"efficient":[9],"fault":[10,35],"diagnosis":[11,101],"method":[12,104],"must":[13],"be":[14,47],"developed.":[15],"Electron\u2010beam":[16],"probing,":[17,58],"which":[18],"allows":[19],"observation":[20],"of":[21,30,45,53,65,73,94,124,134],"the":[22,31,43,74,92,100,125,135],"signal":[23,67],"values":[24,68],"within":[25],"a":[26,50],"chip,":[27],"is":[28,39,70,83,118],"one":[29,72],"promising":[32],"approaches":[33],"for":[34,140],"diagnosis.":[36],"However,":[37],"it":[38,117],"strongly":[40],"desired":[41],"that":[42,121],"number":[44,93],"probes":[46,95],"reduced;":[48],"otherwise,":[49],"great":[51],"deal":[52],"effort":[54],"results.":[55],"The":[56,103],"electron\u2010beam":[57],"guided":[59],"by":[60,86,129],"deduction":[61],"based":[62],"on":[63],"implications":[64],"internal":[66],"[6],":[69],"considered":[71],"effective":[75],"solutions":[76],"to":[77,89,98],"this":[78,81],"problem.":[79],"Here":[80],"idea":[82],"built":[84],"upon":[85],"adding":[87],"preprocessing":[88],"further":[90],"postprocessing":[97],"improve":[99],"resolution.":[102],"proposed":[105],"efficiently":[106],"diagnoses":[107],"multiple":[108],"stuck\u2010at":[109,143],"faults":[110,126,144],"in":[111],"combinational":[112],"circuits.":[113],"Using":[114],"computational":[115],"experiments":[116],"also":[119],"shown":[120],"almost":[122],"all":[123],"are":[127,145],"diagnosed":[128],"probing":[130],"about":[131],"15":[132],"percent":[133],"nets":[136],"when":[137],"test":[138],"patterns":[139],"detecting":[141],"single":[142],"used.":[146]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}