{"id":"https://openalex.org/W2030835755","doi":"https://doi.org/10.1002/scj.4690200401","title":"Maximum PLA folding using inverters","display_name":"Maximum PLA folding using inverters","publication_year":1989,"publication_date":"1989-01-01","ids":{"openalex":"https://openalex.org/W2030835755","doi":"https://doi.org/10.1002/scj.4690200401","mag":"2030835755"},"language":"en","primary_location":{"id":"doi:10.1002/scj.4690200401","is_oa":false,"landing_page_url":"https://doi.org/10.1002/scj.4690200401","pdf_url":null,"source":{"id":"https://openalex.org/S58208175","display_name":"Systems and Computers in Japan","issn_l":"0882-1666","issn":["0882-1666","1520-684X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Systems and Computers in Japan","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110610236","display_name":"Yukihiro Iguchi","orcid":null},"institutions":[{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]},{"id":"https://openalex.org/I4387930200","display_name":"Information Processing Society of Japan","ror":"https://ror.org/02v970d04","country_code":null,"type":"nonprofit","lineage":["https://openalex.org/I4387930200"]},{"id":"https://openalex.org/I36253440","display_name":"IEEE Computer Society","ror":"https://ror.org/05nxk6n24","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I36253440"]}],"countries":["JP","US"],"is_corresponding":true,"raw_author_name":"Yukihiro Iguchi","raw_affiliation_strings":["Faculty of Engineering, Meiji University, Kawasaki, Japan 214","Masao Mukaidono obtained his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1965, 1968, and 1973, respectively. He is currently a Professor in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in multiple-valued logic, fuzzy set theory and its applications, fault-tolerant computing systems, and computer-aided logic design. Member of the IEEE Computer Society; the Institute of Electronics, Information and Communication Engineers of Japan; and the Information Processing Society of Japan","the Information Processing Society of Japan","the Institute of Electronics, Information and Communication Engineers of Japan","Masao Mukaidono obtained his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1965, 1968, and 1973, respectively. He is currently a Professor in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in multiple-valued logic, fuzzy set theory and its applications, fault-tolerant computing systems, and computer-aided logic design. Member of the IEEE Computer Society"],"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, Meiji University, Kawasaki, Japan 214","institution_ids":["https://openalex.org/I16656306"]},{"raw_affiliation_string":"Masao Mukaidono obtained his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1965, 1968, and 1973, respectively. He is currently a Professor in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in multiple-valued logic, fuzzy set theory and its applications, fault-tolerant computing systems, and computer-aided logic design. Member of the IEEE Computer Society; the Institute of Electronics, Information and Communication Engineers of Japan; and the Information Processing Society of Japan","institution_ids":[]},{"raw_affiliation_string":"the Information Processing Society of Japan","institution_ids":["https://openalex.org/I4387930200"]},{"raw_affiliation_string":"the Institute of Electronics, Information and Communication Engineers of Japan","institution_ids":[]},{"raw_affiliation_string":"Masao Mukaidono obtained his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1965, 1968, and 1973, respectively. He is currently a Professor in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in multiple-valued logic, fuzzy set theory and its applications, fault-tolerant computing systems, and computer-aided logic design. Member of the IEEE Computer Society","institution_ids":["https://openalex.org/I36253440"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035875969","display_name":"Masao Mukaidono","orcid":null},"institutions":[{"id":"https://openalex.org/I4210092329","display_name":"Institute of Electronics, Information and Communication Engineers","ror":"https://ror.org/00e1wd906","country_code":"JP","type":"nonprofit","lineage":["https://openalex.org/I4210092329"]},{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]},{"id":"https://openalex.org/I4387930200","display_name":"Information Processing Society of Japan","ror":"https://ror.org/02v970d04","country_code":null,"type":"nonprofit","lineage":["https://openalex.org/I4387930200"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masao Mukaidono","raw_affiliation_strings":["Faculty of Engineering, Meiji University, Kawasaki, Japan 214","Yukihiro Iguchi received his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1982, 1984, and 1987, respectively. He is currently an Assistant in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in computer-aided design of integrated circuits and systems. Member of the Institute of Electronics, Information and Communication Engineers of Japan; and the Information Processing Society of Japan","the Information Processing Society of Japan","Yukihiro Iguchi received his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1982, 1984, and 1987, respectively. He is currently an Assistant in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in computer-aided design of integrated circuits and systems. Member of the Institute of Electronics, Information and Communication Engineers of Japan"],"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, Meiji University, Kawasaki, Japan 214","institution_ids":["https://openalex.org/I16656306"]},{"raw_affiliation_string":"Yukihiro Iguchi received his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1982, 1984, and 1987, respectively. He is currently an Assistant in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in computer-aided design of integrated circuits and systems. Member of the Institute of Electronics, Information and Communication Engineers of Japan; and the Information Processing Society of Japan","institution_ids":[]},{"raw_affiliation_string":"the Information Processing Society of Japan","institution_ids":["https://openalex.org/I4387930200"]},{"raw_affiliation_string":"Yukihiro Iguchi received his B.S., M.S., and Ph.D. in Electrical Engineering from Meiji University in 1982, 1984, and 1987, respectively. He is currently an Assistant in the Dept. Electronics and Communications, Faculty of Engineering, Meiji University. His main research interests are in computer-aided design of integrated circuits and systems. Member of the Institute of Electronics, Information and Communication Engineers of Japan","institution_ids":["https://openalex.org/I16656306","https://openalex.org/I4210092329"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5110610236"],"corresponding_institution_ids":["https://openalex.org/I16656306","https://openalex.org/I36253440","https://openalex.org/I4387930200"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19317442,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":"4","first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12029","display_name":"DNA and Biological Computing","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/folding","display_name":"Folding (DSP implementation)","score":0.8230843544006348},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5837700366973877},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5705470442771912},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.5345280170440674},{"id":"https://openalex.org/keywords/negation","display_name":"Negation","score":0.4857783615589142},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.47458764910697937},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.44647374749183655},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.43377625942230225},{"id":"https://openalex.org/keywords/fold","display_name":"Fold (higher-order function)","score":0.4241119623184204},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.370241641998291},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3605692982673645},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3081754148006439},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.12646859884262085},{"id":"https://openalex.org/keywords/geometry","display_name":"Geometry","score":0.11923986673355103},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09473448991775513},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0762234628200531},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.06781595945358276}],"concepts":[{"id":"https://openalex.org/C2776545253","wikidata":"https://www.wikidata.org/wiki/Q5464292","display_name":"Folding (DSP implementation)","level":2,"score":0.8230843544006348},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5837700366973877},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5705470442771912},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.5345280170440674},{"id":"https://openalex.org/C2185349","wikidata":"https://www.wikidata.org/wiki/Q190558","display_name":"Negation","level":2,"score":0.4857783615589142},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.47458764910697937},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.44647374749183655},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.43377625942230225},{"id":"https://openalex.org/C53942344","wikidata":"https://www.wikidata.org/wiki/Q951651","display_name":"Fold (higher-order function)","level":2,"score":0.4241119623184204},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.370241641998291},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3605692982673645},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3081754148006439},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.12646859884262085},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.11923986673355103},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09473448991775513},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0762234628200531},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.06781595945358276},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1002/scj.4690200401","is_oa":false,"landing_page_url":"https://doi.org/10.1002/scj.4690200401","pdf_url":null,"source":{"id":"https://openalex.org/S58208175","display_name":"Systems and Computers in Japan","issn_l":"0882-1666","issn":["0882-1666","1520-684X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Systems and Computers in Japan","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W235857810","https://openalex.org/W1997941343","https://openalex.org/W2001885513","https://openalex.org/W2032092293","https://openalex.org/W2105761964","https://openalex.org/W2123458091","https://openalex.org/W2124078793","https://openalex.org/W2143132439","https://openalex.org/W2143551146","https://openalex.org/W2154499040","https://openalex.org/W2156916334","https://openalex.org/W4238824332","https://openalex.org/W4248234723","https://openalex.org/W4249055192"],"related_works":["https://openalex.org/W2059922809","https://openalex.org/W1181095405","https://openalex.org/W2387527986","https://openalex.org/W2479250593","https://openalex.org/W4283261428","https://openalex.org/W2131148043","https://openalex.org/W3014426369","https://openalex.org/W2092783274","https://openalex.org/W4318829426","https://openalex.org/W4391025849"],"abstract_inverted_index":{"Abstract":[0],"It":[1,102],"is":[2,86,100,103],"desired":[3],"to":[4,11,105],"reduce":[5],"the":[6,13,18,22,27,36,47,74,90,107],"area":[7,15],"of":[8],"mask":[9],"PLA":[10],"save":[12],"silicon":[14],"and":[16,55,79],"improve":[17],"switching":[19],"speed.":[20],"In":[21,49],"usual":[23],"methods":[24],"for":[25],"folding,":[26],"columns":[28],"and/or":[29],"rows":[30],"are":[31,58],"folded":[32,59],"with":[33],"cuts.":[34],"On":[35],"contrary,":[37],"recently,":[38],"a":[39,52],"new":[40],"folding":[41,71],"technique":[42],"has":[43],"been":[44],"proposed":[45],"by":[46,63,72],"authors.":[48],"that":[50,70,97],"technique,":[51],"variable":[53],"line":[54,62],"its":[56,82],"negation":[57],"into":[60],"one":[61],"inserting":[64],"an":[65],"inverter.":[66],"This":[67],"paper":[68],"formulates":[69],"using":[73],"regular":[75],"ternary":[76],"logic":[77],"function":[78],"then":[80],"clarifies":[81],"properties.":[83],"An":[84],"algorithm":[85,99,108],"described":[87],"which":[88],"generates":[89],"maximum":[91],"folding.":[92],"Some":[93],"experimental":[94],"results":[95],"indicate":[96],"this":[98],"effective.":[101],"easy":[104],"implement":[106],"on":[109],"computers.":[110]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}