{"id":"https://openalex.org/W2095370789","doi":"https://doi.org/10.1002/ett.4460010311","title":"Three\u2010dimensional simulation of VLSI structures","display_name":"Three\u2010dimensional simulation of VLSI structures","publication_year":1990,"publication_date":"1990-05-01","ids":{"openalex":"https://openalex.org/W2095370789","doi":"https://doi.org/10.1002/ett.4460010311","mag":"2095370789"},"language":"en","primary_location":{"id":"doi:10.1002/ett.4460010311","is_oa":false,"landing_page_url":"https://doi.org/10.1002/ett.4460010311","pdf_url":null,"source":{"id":"https://openalex.org/S4393917101","display_name":"European Transactions on Telecommunications","issn_l":"1124-318X","issn":["1124-318X","1541-8251"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"European Transactions on Telecommunications","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037824516","display_name":"P. Ciampolini","orcid":null},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Paolo Ciampolini","raw_affiliation_strings":["Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","institution_ids":["https://openalex.org/I9360294"]},{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085931692","display_name":"A. Pierantoni","orcid":null},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Anna Pierantoni","raw_affiliation_strings":["Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","institution_ids":["https://openalex.org/I9360294"]},{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045347874","display_name":"M. Rudan","orcid":"https://orcid.org/0000-0001-5485-7067"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Massimo Rudan","raw_affiliation_strings":["Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","institution_ids":["https://openalex.org/I9360294"]},{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027361765","display_name":"G. Baccarani","orcid":"https://orcid.org/0000-0001-7365-5495"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giorgio Baccarani","raw_affiliation_strings":["Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universita\u0301 di Bologna - Viale Risorgimento, 2 - 40136 Bologna - Italy","institution_ids":["https://openalex.org/I9360294"]},{"raw_affiliation_string":"Dipartimento di Elettronica, Informatics e Sistemistica Universit\u00e1 di Bologna \u2010 Viale Risorgimento, 2 \u2010 40136 Bologna \u2010 Italy","institution_ids":["https://openalex.org/I9360294"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5037824516"],"corresponding_institution_ids":["https://openalex.org/I9360294"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20429672,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":"3","first_page":"301","last_page":"306"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11723","display_name":"Optical Coatings and Gratings","score":0.9908999800682068,"subfield":{"id":"https://openalex.org/subfields/2508","display_name":"Surfaces, Coatings and Films"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9865000247955322,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7989542484283447},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6979560256004333},{"id":"https://openalex.org/keywords/discretization","display_name":"Discretization","score":0.6104103922843933},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5531116724014282},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.45444804430007935},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.36512768268585205},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33127081394195557},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.18906459212303162},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0899086594581604}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7989542484283447},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6979560256004333},{"id":"https://openalex.org/C73000952","wikidata":"https://www.wikidata.org/wiki/Q17007827","display_name":"Discretization","level":2,"score":0.6104103922843933},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5531116724014282},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.45444804430007935},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36512768268585205},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33127081394195557},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.18906459212303162},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0899086594581604},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1002/ett.4460010311","is_oa":false,"landing_page_url":"https://doi.org/10.1002/ett.4460010311","pdf_url":null,"source":{"id":"https://openalex.org/S4393917101","display_name":"European Transactions on Telecommunications","issn_l":"1124-318X","issn":["1124-318X","1541-8251"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"European Transactions on Telecommunications","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1562011277","https://openalex.org/W1969468690","https://openalex.org/W1973728196","https://openalex.org/W2065725998","https://openalex.org/W2078745847","https://openalex.org/W2569133694"],"related_works":["https://openalex.org/W2006251942","https://openalex.org/W2364741597","https://openalex.org/W1492103595","https://openalex.org/W1864774435","https://openalex.org/W946352265","https://openalex.org/W3020787026","https://openalex.org/W2334479858","https://openalex.org/W2799209613","https://openalex.org/W1971388572","https://openalex.org/W2135686668"],"abstract_inverted_index":{"Abstract":[0],"Recent":[1],"VLSI":[2],"technologies":[3],"allow":[4],"for":[5,13],"increasingly":[6],"small":[7],"and":[8,37],"complex":[9,71],"devices,":[10],"this":[11,18],"calling":[12],"three\u2010dimensional":[14],"device":[15],"simulation.":[16],"In":[17],"paper,":[19],"a":[20],"3D":[21],"simulator":[22],"is":[23],"presented:":[24],"the":[25,47,52,60,66],"most":[26,58],"relevant":[27],"problems":[28],"in":[29,34,69],"its":[30],"development":[31],"were":[32],"found":[33],"geometry":[35],"management":[36],"computational":[38,49],"efficiency.":[39],"The":[40],"adoption":[41],"of":[42,59],"suitable":[43],"linear":[44],"solvers":[45],"enhances":[46],"overall":[48],"performance,":[50],"wihile":[51],"prism\u2010based":[53],"discretization":[54],"scheme":[55],"greatly":[56],"simplifies":[57],"geometry\u2010related":[61],"algorithms,":[62],"as":[63],"demonstrated":[64],"by":[65],"proposed":[67],"examples,":[68],"which":[70],"EPROM\u2010cell":[72],"structures":[73],"are":[74],"easily":[75],"handled.":[76]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
