{"id":"https://openalex.org/W2168115688","doi":"https://doi.org/10.1002/cta.4490230404","title":"Darwin: Analogue circuit synthesis based on genetic algorithms","display_name":"Darwin: Analogue circuit synthesis based on genetic algorithms","publication_year":1995,"publication_date":"1995-07-01","ids":{"openalex":"https://openalex.org/W2168115688","doi":"https://doi.org/10.1002/cta.4490230404","mag":"2168115688"},"language":"en","primary_location":{"id":"doi:10.1002/cta.4490230404","is_oa":false,"landing_page_url":"https://doi.org/10.1002/cta.4490230404","pdf_url":null,"source":{"id":"https://openalex.org/S92132303","display_name":"International Journal of Circuit Theory and Applications","issn_l":"0098-9886","issn":["0098-9886","1097-007X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Circuit Theory and Applications","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083578379","display_name":"Wim Kruiskamp","orcid":null},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Wim Kruiskamp","raw_affiliation_strings":["Department of Electrical Engineering, Eindhoven University of Technology, PO Box 531, NL-5600 MB Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Eindhoven University of Technology, PO Box 531, NL-5600 MB Eindhoven, Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054845504","display_name":"D.M.W. Leenaerts","orcid":"https://orcid.org/0000-0001-9492-923X"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Domine Leenaerts","raw_affiliation_strings":["Department of Electrical Engineering, Eindhoven University of Technology, PO Box 531, NL-5600 MB Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Eindhoven University of Technology, PO Box 531, NL-5600 MB Eindhoven, Netherlands","institution_ids":["https://openalex.org/I83019370"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I83019370"],"apc_list":{"value":3660,"currency":"USD","value_usd":3660},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.18982517,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"23","issue":"4","first_page":"285","last_page":"296"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10848","display_name":"Advanced Multi-Objective Optimization Algorithms","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossover","display_name":"Crossover","score":0.6943250894546509},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5962501764297485},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5742170810699463},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5380316376686096},{"id":"https://openalex.org/keywords/genetic-algorithm","display_name":"Genetic algorithm","score":0.5305472016334534},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5095396637916565},{"id":"https://openalex.org/keywords/darwin","display_name":"Darwin (ADL)","score":0.5077739357948303},{"id":"https://openalex.org/keywords/population","display_name":"Population","score":0.494290828704834},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.44513237476348877},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.43677663803100586},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4298439621925354},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2802659869194031},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22190165519714355},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12098407745361328},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.09551197290420532},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.07819601893424988}],"concepts":[{"id":"https://openalex.org/C122507166","wikidata":"https://www.wikidata.org/wiki/Q628906","display_name":"Crossover","level":2,"score":0.6943250894546509},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5962501764297485},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5742170810699463},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5380316376686096},{"id":"https://openalex.org/C8880873","wikidata":"https://www.wikidata.org/wiki/Q187787","display_name":"Genetic algorithm","level":2,"score":0.5305472016334534},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5095396637916565},{"id":"https://openalex.org/C206118921","wikidata":"https://www.wikidata.org/wiki/Q5225921","display_name":"Darwin (ADL)","level":2,"score":0.5077739357948303},{"id":"https://openalex.org/C2908647359","wikidata":"https://www.wikidata.org/wiki/Q2625603","display_name":"Population","level":2,"score":0.494290828704834},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.44513237476348877},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.43677663803100586},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4298439621925354},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2802659869194031},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22190165519714355},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12098407745361328},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.09551197290420532},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.07819601893424988},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C144024400","wikidata":"https://www.wikidata.org/wiki/Q21201","display_name":"Sociology","level":0,"score":0.0},{"id":"https://openalex.org/C149923435","wikidata":"https://www.wikidata.org/wiki/Q37732","display_name":"Demography","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1002/cta.4490230404","is_oa":false,"landing_page_url":"https://doi.org/10.1002/cta.4490230404","pdf_url":null,"source":{"id":"https://openalex.org/S92132303","display_name":"International Journal of Circuit Theory and Applications","issn_l":"0098-9886","issn":["0098-9886","1097-007X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Circuit Theory and Applications","raw_type":"journal-article"},{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/f9ff3ff3-ecda-4153-ac60-7755b64b49e8","is_oa":false,"landing_page_url":"https://research.tue.nl/en/publications/f9ff3ff3-ecda-4153-ac60-7755b64b49e8","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Kruiskamp, M W & Leenaerts, D M W 1995, 'DARWIN: analogue circuit synthesis based on a genetic algorithms', International Journal of Circuit Theory and Applications, vol. 23, no. 4, pp. 285-296. https://doi.org/10.1002/cta.4490230404","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:tue:oai:pure.tue.nl:publications/f9ff3ff3-ecda-4153-ac60-7755b64b49e8","is_oa":false,"landing_page_url":"https://research.tue.nl/nl/publications/f9ff3ff3-ecda-4153-ac60-7755b64b49e8","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Circuit Theory and Applications, 23(4), 285 - 296. Wiley","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1495851026","https://openalex.org/W1548102932","https://openalex.org/W1967442761","https://openalex.org/W1979536092","https://openalex.org/W2000216547","https://openalex.org/W2013515752","https://openalex.org/W2017218042","https://openalex.org/W2058836852","https://openalex.org/W2064712020","https://openalex.org/W2065367661","https://openalex.org/W2068484625","https://openalex.org/W2097913753","https://openalex.org/W2117947804","https://openalex.org/W2123219988","https://openalex.org/W2132308288","https://openalex.org/W2135684885","https://openalex.org/W2161865343","https://openalex.org/W4233622498"],"related_works":["https://openalex.org/W2347477706","https://openalex.org/W4299389082","https://openalex.org/W1943663474","https://openalex.org/W2306830238","https://openalex.org/W2110294633","https://openalex.org/W2014162767","https://openalex.org/W2115729582","https://openalex.org/W2046083801","https://openalex.org/W2025100153","https://openalex.org/W2367260997"],"abstract_inverted_index":{"Abstract":[0],"DARWIN":[1,119],"is":[2,120],"a":[3,48,100,108],"synthesis":[4,22,61],"tool":[5],"for":[6,107],"generating":[7],"sized":[8],"net":[9],"lists":[10],"of":[11,29,43,102,111,122,129],"CMOS":[12],"op":[13,32,44,53],"amps":[14,45,54],"from":[15],"performance":[16],"specifications":[17],"and":[18,39,66,73,76],"process":[19,23,62],"parameters.":[20],"the":[21,41,56,60,63,81,84,90,112,127],"starts":[24],"with":[25,80],"an":[26],"initial":[27],"set":[28],"randomly":[30],"generated":[31,97],"amps.":[33],"Owing":[34],"to":[35,47],"genetic":[36,91],"operator":[37],"\u2018crossover\u2019":[38],"\u2018mutation\u2019,":[40],"population":[42,49],"evolves":[46],"in":[50,89],"which":[51],"several":[52],"meet":[55],"required":[57,106],"specifications.":[58],"During":[59],"circuit":[64,67,85],"topology":[65],"parameters":[68],"(capacitor":[69],"values,":[70],"bias":[71],"currents":[72],"transistor":[74],"lengths":[75],"widths)":[77],"evolve":[78],"simultaneously":[79],"final":[82],"solution.":[83],"description":[86],"we":[87],"use":[88],"algorithm":[92],"ensures":[93],"that":[94,104,118],"all":[95],"intermediately":[96],"circuits":[98,125],"possess":[99],"number":[101],"qualities":[103],"are":[105],"correct":[109],"functioning":[110],"circuit.":[113],"Synthesis":[114],"experiments":[115],"have":[116],"shown":[117],"capable":[121],"synthesizing":[123],"functional":[124],"without":[126],"need":[128],"much":[130],"design":[131],"knowledge.":[132]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-23T06:36:01.041984","created_date":"2016-06-24T00:00:00"}
