{"id":"https://openalex.org/W2064062494","doi":"https://doi.org/10.1002/(sici)1520-684x(199702)28:2<62::aid-scj7>3.0.co;2-p","title":"A study on snoop cache systems for single-chip multiprocessors","display_name":"A study on snoop cache systems for single-chip multiprocessors","publication_year":1997,"publication_date":"1997-02-01","ids":{"openalex":"https://openalex.org/W2064062494","doi":"https://doi.org/10.1002/(sici)1520-684x(199702)28:2<62::aid-scj7>3.0.co;2-p","mag":"2064062494"},"language":"en","primary_location":{"id":"doi:10.1002/(sici)1520-684x(199702)28:2<62::aid-scj7>3.0.co;2-p","is_oa":false,"landing_page_url":"https://doi.org/10.1002/(sici)1520-684x(199702)28:2<62::aid-scj7>3.0.co;2-p","pdf_url":null,"source":{"id":"https://openalex.org/S58208175","display_name":"Systems and Computers in Japan","issn_l":"0882-1666","issn":["0882-1666","1520-684X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Systems and Computers in Japan","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109897758","display_name":"Takuya Terasawa","orcid":null},"institutions":[{"id":"https://openalex.org/I148798404","display_name":"Tokyo University of Technology","ror":"https://ror.org/021a26605","country_code":"JP","type":"education","lineage":["https://openalex.org/I148798404"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Takuya Terasawa","raw_affiliation_strings":["Department of Information Networks, Tokyo Engineering University, Hachioji, Japan 192"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Networks, Tokyo Engineering University, Hachioji, Japan 192","institution_ids":["https://openalex.org/I148798404"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100554306","display_name":"Keisuke Inoue","orcid":null},"institutions":[{"id":"https://openalex.org/I203951103","display_name":"Keio University","ror":"https://ror.org/02kn6nx58","country_code":"JP","type":"education","lineage":["https://openalex.org/I203951103"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Keisuke Inoue","raw_affiliation_strings":["Department of Computer Science, Keio University, Yokohama, Japan 223"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Keio University, Yokohama, Japan 223","institution_ids":["https://openalex.org/I203951103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032844562","display_name":"Hitoshi Kurosawa","orcid":null},"institutions":[{"id":"https://openalex.org/I203951103","display_name":"Keio University","ror":"https://ror.org/02kn6nx58","country_code":"JP","type":"education","lineage":["https://openalex.org/I203951103"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hitoshi Kurosawa","raw_affiliation_strings":["Department of Computer Science, Keio University, Yokohama, Japan 223"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Keio University, Yokohama, Japan 223","institution_ids":["https://openalex.org/I203951103"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113742339","display_name":"Hideharu Amano","orcid":null},"institutions":[{"id":"https://openalex.org/I203951103","display_name":"Keio University","ror":"https://ror.org/02kn6nx58","country_code":"JP","type":"education","lineage":["https://openalex.org/I203951103"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hideharu Amano","raw_affiliation_strings":["Department of Computer Science, Keio University, Yokohama, Japan 223"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Keio University, Yokohama, Japan 223","institution_ids":["https://openalex.org/I203951103"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5109897758"],"corresponding_institution_ids":["https://openalex.org/I148798404"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15239551,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"28","issue":"2","first_page":"62","last_page":"72"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7625950574874878},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5970885753631592},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5817577242851257},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.49372634291648865},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.4674096405506134},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.42900344729423523},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3921097218990326},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3814821243286133},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3373708724975586},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.30219435691833496},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.06766873598098755}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7625950574874878},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5970885753631592},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5817577242851257},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.49372634291648865},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.4674096405506134},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.42900344729423523},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3921097218990326},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3814821243286133},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3373708724975586},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.30219435691833496},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06766873598098755}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1002/(sici)1520-684x(199702)28:2<62::aid-scj7>3.0.co;2-p","is_oa":false,"landing_page_url":"https://doi.org/10.1002/(sici)1520-684x(199702)28:2<62::aid-scj7>3.0.co;2-p","pdf_url":null,"source":{"id":"https://openalex.org/S58208175","display_name":"Systems and Computers in Japan","issn_l":"0882-1666","issn":["0882-1666","1520-684X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Systems and Computers in Japan","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W598272858","https://openalex.org/W1486253252","https://openalex.org/W1560018725","https://openalex.org/W1966285605","https://openalex.org/W1968504700","https://openalex.org/W2021817036","https://openalex.org/W2100893446","https://openalex.org/W2106626405","https://openalex.org/W2139505369","https://openalex.org/W2168858252","https://openalex.org/W2173730676","https://openalex.org/W3147393942","https://openalex.org/W4249203857"],"related_works":["https://openalex.org/W4312759433","https://openalex.org/W2123859627","https://openalex.org/W2290179447","https://openalex.org/W2057019356","https://openalex.org/W1994369542","https://openalex.org/W2108638805","https://openalex.org/W2184371594","https://openalex.org/W2148571123","https://openalex.org/W2801630946","https://openalex.org/W2148865405"],"abstract_inverted_index":{"Progress":[0],"in":[1,91],"device":[2],"design":[3],"and":[4,14,45,51,108,121],"implementation":[5],"technologies":[6],"will":[7,54,100],"change":[8],"the":[9,28,31,34,42,49,72,87,102,126,130,146,152],"structure":[10],"of":[11,30,41,93,105,133],"bus-connected":[12],"multi-processors":[13],"allow":[15],"them":[16,111],"to":[17,95],"be":[18,101],"implemented":[19],"on":[20,60,76],"a":[21,56,77],"single":[22],"chip.":[23],"In":[24,81],"such":[25],"an":[26,117,140],"implementation,":[27],"speed":[29],"bus":[32],"inside":[33],"chip":[35,50],"is":[36,75],"far":[37],"faster":[38],"than":[39],"that":[40,71,139,143],"backplane":[43],"bus,":[44],"data":[46],"transfer":[47],"between":[48,149],"external":[52],"devices":[53],"become":[55],"bottleneck.":[57],"Many":[58],"studies":[59],"snoop":[61,88],"cache":[62,73,89,127],"protocols":[63,90],"have":[64],"been":[65],"made,":[66],"but":[67],"they":[68],"generally":[69],"assume":[70],"memory":[74],"printed":[78],"circuit":[79],"board.":[80],"this":[82],"paper,":[83],"we":[84],"first":[85],"classify":[86],"terms":[92],"accesses":[94],"off-chip":[96],"shared":[97,134],"memory,":[98],"which":[99],"principal":[103],"cause":[104],"performance":[106,154],"degradation,":[107],"then":[109],"compare":[110],"quantitatively.":[112],"Evaluations":[113],"are":[114],"made":[115],"with":[116],"instruction-level":[118],"multiprocessor":[119],"simulator":[120],"practical":[122],"parallel":[123],"applications,":[124],"varying":[125],"size":[128],"or":[129],"access":[131],"latency":[132],"memory.":[135],"The":[136],"results":[137],"show":[138],"I/N/C":[141],"protocol":[142],"actively":[144],"uses":[145],"line":[147],"transfers":[148],"caches":[150],"achieves":[151],"highest":[153],"under":[155],"all":[156],"conditions.":[157],"\u00a9":[158],"1997":[159,168],"Scripta":[160],"Technica,":[161],"Inc.":[162],"Syst":[163],"Comp":[164],"Jpn,":[165],"28(2):":[166],"62\u201372,":[167]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
