{"id":"https://openalex.org/W2004752093","doi":"https://doi.org/10.1002/(sici)1097-007x(199907/08)27:4<375::aid-cta64>3.0.co;2-7","title":"Analytical estimation of propagation delay and short-circuit power dissipation in CMOS gates","display_name":"Analytical estimation of propagation delay and short-circuit power dissipation in CMOS gates","publication_year":1999,"publication_date":"1999-07-01","ids":{"openalex":"https://openalex.org/W2004752093","doi":"https://doi.org/10.1002/(sici)1097-007x(199907/08)27:4<375::aid-cta64>3.0.co;2-7","mag":"2004752093"},"language":"en","primary_location":{"id":"doi:10.1002/(sici)1097-007x(199907/08)27:4<375::aid-cta64>3.0.co;2-7","is_oa":false,"landing_page_url":"https://doi.org/10.1002/(sici)1097-007x(199907/08)27:4<375::aid-cta64>3.0.co;2-7","pdf_url":null,"source":{"id":"https://openalex.org/S92132303","display_name":"International Journal of Circuit Theory and Applications","issn_l":"0098-9886","issn":["0098-9886","1097-007X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Circuit Theory and Applications","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023894427","display_name":"S. Nikolaidis","orcid":"https://orcid.org/0000-0002-9794-8062"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"S. Nikolaidis","raw_affiliation_strings":["Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki, Greece","Dept. of Physics, Aristotle Univ. of Thessaloniki, 54006 Thessaloniki, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Physics, Aristotle University of Thessaloniki, 54006 Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]},{"raw_affiliation_string":"Dept. of Physics, Aristotle Univ. of Thessaloniki, 54006 Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005131176","display_name":"Alexander Chatzigeorgiou","orcid":"https://orcid.org/0000-0002-5381-8418"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"A. Chatzigeorgiou","raw_affiliation_strings":["Computer Science Department, Aristotle University of Thessaloniki, 54006 Thessaloniki, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science Department, Aristotle University of Thessaloniki, 54006 Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5005131176"],"corresponding_institution_ids":["https://openalex.org/I21370196"],"apc_list":{"value":3660,"currency":"USD","value_usd":3660},"apc_paid":null,"fwci":1.4002,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.79913589,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"27","issue":"4","first_page":"375","last_page":"392"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.7535130977630615},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.6720412969589233},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.658486545085907},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.6497292518615723},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.6448357701301575},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5973812937736511},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5406498312950134},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4198019504547119},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4162146747112274},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.41508546471595764},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.4006069302558899},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3947144150733948},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.36594292521476746},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3229343295097351},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.21926486492156982},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12457075715065002}],"concepts":[{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.7535130977630615},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.6720412969589233},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.658486545085907},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.6497292518615723},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.6448357701301575},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5973812937736511},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5406498312950134},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4198019504547119},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4162146747112274},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.41508546471595764},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4006069302558899},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3947144150733948},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.36594292521476746},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3229343295097351},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.21926486492156982},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12457075715065002},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1002/(sici)1097-007x(199907/08)27:4<375::aid-cta64>3.0.co;2-7","is_oa":false,"landing_page_url":"https://doi.org/10.1002/(sici)1097-007x(199907/08)27:4<375::aid-cta64>3.0.co;2-7","pdf_url":null,"source":{"id":"https://openalex.org/S92132303","display_name":"International Journal of Circuit Theory and Applications","issn_l":"0098-9886","issn":["0098-9886","1097-007X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320595","host_organization_name":"Wiley","host_organization_lineage":["https://openalex.org/P4310320595"],"host_organization_lineage_names":["Wiley"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Circuit Theory and Applications","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.20.5318","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.20.5318","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://macedonia.uom.gr/~achat/papers/IJCT99.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6000000238418579,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W61072085","https://openalex.org/W1549403103","https://openalex.org/W1967514275","https://openalex.org/W1967694188","https://openalex.org/W2055510065","https://openalex.org/W2102408493","https://openalex.org/W2108923470","https://openalex.org/W2109391721","https://openalex.org/W2114864411","https://openalex.org/W2122219454","https://openalex.org/W2123597521","https://openalex.org/W2124258712","https://openalex.org/W2126715110","https://openalex.org/W2130004584","https://openalex.org/W2131466253","https://openalex.org/W2134067926","https://openalex.org/W2142896025","https://openalex.org/W2155255532","https://openalex.org/W2157024459","https://openalex.org/W2161256220","https://openalex.org/W2166109397"],"related_works":["https://openalex.org/W3015599398","https://openalex.org/W2034656493","https://openalex.org/W1986847619","https://openalex.org/W2188730438","https://openalex.org/W2157230896","https://openalex.org/W2792778858","https://openalex.org/W2362904186","https://openalex.org/W2769457990","https://openalex.org/W2035475131","https://openalex.org/W4281385583"],"abstract_inverted_index":{"An":[0],"efficient":[1],"analytical":[2],"method":[3],"for":[4,82,89],"calculating":[5],"the":[6,10,26,33,42,47,51,58,90,93,97,105,110,113],"propagation":[7,94],"delay":[8,95],"and":[9,57,66,81,96],"short-circuit":[11,98],"power":[12,99],"dissipation":[13,100],"of":[14,28,36,38,45,50,54,60,78,112],"CMOS":[15],"gates":[16],"is":[17,71],"introduced":[18],"in":[19,119],"this":[20],"paper.":[21],"Key":[22],"factors":[23],"that":[24,108],"determine":[25],"operation":[27,37,111],"a":[29,55],"gate,":[30],"such":[31],"as":[32],"different":[34],"modes":[35],"serially":[39],"connected":[40],"transistors,":[41],"starting":[43],"point":[44],"conduction,":[46],"parasitic":[48],"behaviour":[49,59],"short-circuiting":[52],"block":[53],"gate":[56],"parallel":[61],"transistor":[62],"structures":[63],"are":[64,101,118],"analysed":[65],"properly":[67],"modelled.":[68],"The":[69,115],"analysis":[70],"performed":[72],"taking":[73],"into":[74],"account":[75],"second-order":[76],"effects":[77],"short-channel":[79],"devices":[80],"non-zero":[83],"transition":[84],"time":[85],"inputs.":[86],"Analytical":[87],"expressions":[88],"output":[91],"waveform,":[92],"obtained":[102],"by":[103],"solving":[104],"differential":[106],"equations":[107],"govern":[109],"gate.":[114],"calculated":[116],"results":[117],"excellent":[120],"agreement":[121],"with":[122],"SPICE":[123],"simulations.":[124],"Copyright":[125],"\u00a9":[126],"1999":[127],"John":[128],"Wiley":[129],"&":[130],"Sons,":[131],"Ltd.":[132]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}