{"id":"https://openalex.org/W82104495","doi":null,"title":"Searching RC5-Keys with Distributed Reconfigurable Computing.","display_name":"Searching RC5-Keys with Distributed Reconfigurable Computing.","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W82104495","mag":"82104495"},"language":"en","primary_location":{"id":"mag:82104495","doi":null,"is_oa":false,"landing_page_url":"https://www12.informatik.uni-erlangen.de/publications/pub2006/ersa06_koch.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306509693","display_name":"ERSA","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"ERSA","raw_type":null},"volume":null,"type":"article","indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064000482","display_name":"Dirk Koch","orcid":"https://orcid.org/0000-0002-2568-4432","observed_orcids":["https://orcid.org/0000-0002-2568-4432"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dirk Koch","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0002-2568-4432","affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043034864","display_name":"Matthiaas Koerber","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Matthiaas Koerber","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5076672029","display_name":"J\u00fcrgen Teich","orcid":"https://orcid.org/0000-0001-6285-5862","observed_orcids":["https://orcid.org/0000-0001-6285-5862"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"J\u00fcrgen Teich","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0001-6285-5862","affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.6193,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.92707525,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"42","last_page":"48"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9771000146865845,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9771000146865845,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.005400000140070915,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.0017000000225380063,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/rc5","display_name":"RC5","score":0.6470000147819519},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"distributed computing","score":0.8230000138282776},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"reconfigurable computing","score":0.9570000171661377},{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.9649999737739563},{"id":"https://openalex.org/keywords/idle-time-utilization","display_name":"idle time utilization","score":0.578000009059906}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7955769300460815},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.748214840888977},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.6107577681541443},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5864678025245667},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.5531015396118164},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5281902551651001},{"id":"https://openalex.org/C16320812","wikidata":"https://www.wikidata.org/wiki/Q1812200","display_name":"Idle","level":2,"score":0.5089917182922363},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.47954249382019043},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41123417019844055},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3526858687400818},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3070210814476013},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.24654963612556458}],"mesh":[],"locations_count":1,"locations":[{"id":"mag:82104495","doi":null,"is_oa":false,"landing_page_url":"https://www12.informatik.uni-erlangen.de/publications/pub2006/ersa06_koch.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306509693","display_name":"ERSA","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"ERSA","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W192099324","https://openalex.org/W1500356409","https://openalex.org/W1544157371","https://openalex.org/W2106767353","https://openalex.org/W2115294662","https://openalex.org/W2116520095","https://openalex.org/W2146589686"],"related_works":["https://openalex.org/W192099324","https://openalex.org/W2189388990","https://openalex.org/W7037547044","https://openalex.org/W2162148292","https://openalex.org/W3202304565","https://openalex.org/W6999376825","https://openalex.org/W2189098132","https://openalex.org/W2134069332","https://openalex.org/W2169007122","https://openalex.org/W2137228810"],"abstract_inverted_index":{"Distributed":[0,37],"Computing":[1,38],"projects":[2],"such":[3],"as":[4],"SETI@home":[5],"or":[6],"distributed.net":[7,71],"have":[8],"demonstrated":[9,57],"how":[10,103],"supercomputer":[11],"performance":[12],"can":[13,47,88,107],"be":[14,48,89,108],"achieved":[15],"by":[16],"the":[17,59,70],"use":[18],"of":[19,21,30,61,95],"thousands":[20],"linked":[22],"computers":[23],"contributing":[24],"their":[25],"idle":[26],"time.":[27],"The":[28],"goal":[29],"this":[31],"paper":[32],"is":[33,56],"to":[34,50,69],"combine":[35],"traditional":[36],"concepts":[39],"with":[40,92],"reconfigurable":[41,111],"hardware,":[42],"where":[43],"free":[44],"resource":[45],"area":[46],"used":[49,91],"achive":[51],"computation":[52],"speed-ups.":[53],"Our":[54],"approach":[55],"on":[58],"base":[60],"a":[62,79,117],"RC5":[63],"brute":[64],"force":[65],"key":[66,85],"search":[67],"analog":[68],"project.":[72],"To":[73],"support":[74],"this,":[75],"we":[76,100],"implemented":[77],"I)":[78],"platform-independent,":[80],"scalable,":[81],"and":[82,114],"efficient":[83],"hardware":[84],"searcher":[86],"which":[87],"easily":[90],"various":[93],"types":[94],"FPGA":[96],"boards.":[97],"In":[98],"addition,":[99],"II)":[101],"present":[102],"these":[104],"computing":[105],"nodes":[106],"managed":[109],"in":[110],"runtime":[112],"systems":[113],"integrated":[115],"into":[116],"large":[118]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":5}],"updated_date":"2025-10-10T17:16:08.811792","created_date":"2016-06-24T00:00:00"}
