{"id":"https://openalex.org/W7225786231","doi":"https://doi.org/10.3390/electronics15225223","title":"A Two-Transistor MOS-Only Memristor Emulator and Its Coupling-Enhanced Extension","display_name":"A Two-Transistor MOS-Only Memristor Emulator and Its Coupling-Enhanced Extension","publication_year":2026,"publication_date":"2026-11-11","ids":{"openalex":"https://openalex.org/W7225786231","doi":"https://doi.org/10.3390/electronics15225223"},"language":"en","primary_location":{"id":"doi:10.3390/electronics15225223","doi":"https://doi.org/10.3390/electronics15225223","is_oa":true,"landing_page_url":"https://doi.org/10.3390/electronics15225223","pdf_url":null,"source":{"id":"https://openalex.org/S4210202905","display_name":"Electronics","issn_l":"2079-9292","issn":["2079-9292"],"is_oa":true,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","norway-1","poland-100","russia-white-list-2","vabb-shw"],"host_organization":"https://openalex.org/P4310310987","host_organization_name":"Multidisciplinary Digital Publishing Institute","host_organization_lineage":["https://openalex.org/P4310310987"],"host_organization_lineage_names":["Multidisciplinary Digital Publishing Institute"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Electronics","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.3390/electronics15225223","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5161494189","display_name":"Chen Zhou","orcid":"https://orcid.org/0009-0003-7941-6040","observed_orcids":["https://orcid.org/0009-0003-7941-6040"]},"institutions":[{"id":"https://openalex.org/I4210157719","display_name":"Yancheng Institute of Technology","ror":"https://ror.org/04y8njc86","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210157719"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chen Zhou","raw_affiliation_strings":["School of Ocean and Bioengineering, Yancheng Institute of Technology, Yancheng 224051, China"],"raw_orcid":"https://orcid.org/0009-0003-7941-6040","affiliations":[{"raw_affiliation_string":"School of Ocean and Bioengineering, Yancheng Institute of Technology, Yancheng 224051, China","institution_ids":["https://openalex.org/I4210157719"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100325663","display_name":"Lei Zhou","orcid":"https://orcid.org/0000-0002-0678-8682","observed_orcids":["https://orcid.org/0000-0002-0678-8682","https://orcid.org/0000-0002-7566-4819"]},"institutions":[{"id":"https://openalex.org/I4210157719","display_name":"Yancheng Institute of Technology","ror":"https://ror.org/04y8njc86","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210157719"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lei Zhou","raw_affiliation_strings":["School of Electrical Engineering, Yancheng Institute of Technology, Yancheng 224051, China"],"raw_orcid":"https://orcid.org/0000-0002-0678-8682","affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Yancheng Institute of Technology, Yancheng 224051, China","institution_ids":["https://openalex.org/I4210157719"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032855655","display_name":"Chune Wang","orcid":"https://orcid.org/0009-0000-2740-5671","observed_orcids":["https://orcid.org/0009-0000-2740-5671"]},"institutions":[{"id":"https://openalex.org/I4210157719","display_name":"Yancheng Institute of Technology","ror":"https://ror.org/04y8njc86","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210157719"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Chune Wang","raw_affiliation_strings":["School of Material Science Engineering, Yancheng Institute of Technology, Yancheng 224051, China"],"raw_orcid":"https://orcid.org/0009-0000-2740-5671","affiliations":[{"raw_affiliation_string":"School of Material Science Engineering, Yancheng Institute of Technology, Yancheng 224051, China","institution_ids":["https://openalex.org/I4210157719"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5032855655"],"corresponding_institution_ids":["https://openalex.org/I4210157719"],"apc_list":{"value":2400,"currency":"CHF","value_usd":2896},"apc_paid":{"value":2400,"currency":"CHF","value_usd":2896},"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"15","issue":"22","first_page":"5223","last_page":"5223"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.9388999938964844},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6492999792098999},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.6488000154495239},{"id":"https://openalex.org/C123299182","wikidata":"https://www.wikidata.org/wiki/Q190837","display_name":"Hysteresis","level":2,"score":0.6003000140190125},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5932000279426575},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5004000067710876},{"id":"https://openalex.org/C2779664074","wikidata":"https://www.wikidata.org/wiki/Q3518405","display_name":"Terminal (telecommunication)","level":2,"score":0.44290000200271606},{"id":"https://openalex.org/C154318817","wikidata":"https://www.wikidata.org/wiki/Q2157249","display_name":"Parasitic capacitance","level":4,"score":0.4052000045776367},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.40389999747276306},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.38040000200271606},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.37139999866485596},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3684000074863434},{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.3653999865055084},{"id":"https://openalex.org/C68278764","wikidata":"https://www.wikidata.org/wiki/Q444167","display_name":"Capacitive coupling","level":3,"score":0.36160001158714294},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3573000133037567},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35670000314712524},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.3517000079154968},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.33709999918937683},{"id":"https://openalex.org/C113089479","wikidata":"https://www.wikidata.org/wiki/Q210729","display_name":"Electrical element","level":2,"score":0.3368000090122223},{"id":"https://openalex.org/C2778029271","wikidata":"https://www.wikidata.org/wiki/Q5421931","display_name":"Extension (predicate logic)","level":2,"score":0.32359999418258667},{"id":"https://openalex.org/C65655974","wikidata":"https://www.wikidata.org/wiki/Q14867674","display_name":"Swing","level":2,"score":0.322299987077713},{"id":"https://openalex.org/C4775677","wikidata":"https://www.wikidata.org/wiki/Q7449393","display_name":"Semiconductor device modeling","level":3,"score":0.3163999915122986},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.2924000024795532},{"id":"https://openalex.org/C172100665","wikidata":"https://www.wikidata.org/wiki/Q7465774","display_name":"Thermal conduction","level":2,"score":0.28049999475479126},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.2786000072956085},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.27639999985694885},{"id":"https://openalex.org/C199310435","wikidata":"https://www.wikidata.org/wiki/Q7659121","display_name":"Switching time","level":2,"score":0.27300000190734863},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.26409998536109924},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.26339998841285706}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.3390/electronics15225223","doi":"https://doi.org/10.3390/electronics15225223","is_oa":true,"landing_page_url":"https://doi.org/10.3390/electronics15225223","pdf_url":null,"source":{"id":"https://openalex.org/S4210202905","display_name":"Electronics","issn_l":"2079-9292","issn":["2079-9292"],"is_oa":true,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","norway-1","poland-100","russia-white-list-2","vabb-shw"],"host_organization":"https://openalex.org/P4310310987","host_organization_name":"Multidisciplinary Digital Publishing Institute","host_organization_lineage":["https://openalex.org/P4310310987"],"host_organization_lineage_names":["Multidisciplinary Digital Publishing Institute"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Electronics","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.3390/electronics15225223","doi":"https://doi.org/10.3390/electronics15225223","is_oa":true,"landing_page_url":"https://doi.org/10.3390/electronics15225223","pdf_url":null,"source":{"id":"https://openalex.org/S4210202905","display_name":"Electronics","issn_l":"2079-9292","issn":["2079-9292"],"is_oa":true,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","norway-1","poland-100","russia-white-list-2","vabb-shw"],"host_organization":"https://openalex.org/P4310310987","host_organization_name":"Multidisciplinary Digital Publishing Institute","host_organization_lineage":["https://openalex.org/P4310310987"],"host_organization_lineage_names":["Multidisciplinary Digital Publishing Institute"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Electronics","raw_type":"journal-article"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Metal\u2013oxide\u2013semiconductor":[0],"(MOS)-only":[1],"memristor":[2,34,50,72],"emulators":[3],"offer":[4],"simple":[5],"circuit":[6,26],"structures,":[7],"but":[8],"limited":[9],"input-to-state":[10],"coupling":[11,80,96,182],"can":[12],"weaken":[13],"their":[14],"high-frequency":[15,22,103],"state":[16,58],"response,":[17],"motivating":[18],"approaches":[19],"that":[20],"improve":[21],"performance":[23],"while":[24,106],"preserving":[25],"simplicity.":[27],"To":[28],"this":[29],"end,":[30],"a":[31,79,88,129,139],"compact":[32],"MOS-only":[33],"emulator":[35,51,73],"is":[36,75],"proposed":[37],"using":[38,83,195],"one":[39,42],"n-channel":[40],"and":[41,102,152,162,169,179],"p-channel":[43],"MOS":[44],"field-effect":[45],"transistor":[46,55],"(MOSFET).":[47],"This":[48],"two-MOSFET":[49],"(TMME)":[52],"uses":[53],"intrinsic":[54,85],"capacitances":[56],"for":[57],"storage":[59],"without":[60],"explicit":[61],"capacitors,":[62],"resistors,":[63],"or":[64],"an":[65],"auxiliary":[66],"direct-current":[67],"(DC)":[68],"supply.":[69],"A":[70],"three-MOSFET":[71],"(TRMME)":[74],"constructed":[76],"by":[77],"adding":[78],"capacitor,":[81],"realized":[82],"the":[84,92,98,108,133,143,184],"capacitance":[86],"of":[87,189],"third":[89],"MOSFET,":[90],"to":[91],"TMME.":[93],"The":[94,156,186],"added":[95],"enhances":[97],"internal-state":[99,174],"voltage":[100],"swing":[101],"terminal":[104,146],"response":[105],"retaining":[107],"same":[109],"two":[110],"core":[111],"transistors.":[112],"Simulations":[113],"use":[114],"Taiwan":[115],"Semiconductor":[116],"Manufacturing":[117],"Company":[118],"(TSMC;":[119],"Hsinchu,":[120],"Taiwan)":[121],"5-nm":[122],"(N5)":[123],"input/output":[124],"(I/O)":[125],"device":[126],"models.":[127],"Under":[128],"\u00b11.2-V":[130],"sinusoidal":[131],"input,":[132],"TMME":[134],"retains":[135],"post-layout":[136],"hysteresis":[137,147],"at":[138,148],"300-MHz":[140],"benchmark,":[141],"whereas":[142],"TRMME":[144],"exhibits":[145],"9":[149],"GHz":[150],"before":[151],"after":[153],"parasitic":[154],"extraction.":[155],"declared":[157],"cell":[158],"areas":[159],"are":[160,192],"6.480":[161],"8.530":[163],"\u03bcm2,":[164],"respectively.":[165],"Reduced":[166],"charge-balance":[167],"models":[168],"transistor-level":[170],"simulations":[171],"explain":[172],"how":[173,180],"evolution":[175],"governs":[176],"history-dependent":[177],"conduction":[178],"additional":[181],"modifies":[183],"response.":[185],"operating":[187],"principles":[188],"both":[190],"structures":[191],"further":[193],"verified":[194],"discrete":[196],"devices.":[197]},"counts_by_year":[],"updated_date":"2026-11-12T12:28:57.059296","created_date":"2026-11-12T00:00:00"}