{"id":"https://openalex.org/W7225613586","doi":"https://doi.org/10.21203/rs.3.rs-11139606/v1","title":"Design and Performance Analysis of Novel Single-Fin Core Shell Junctionless FinFET (CS-JL-FinFET)","display_name":"Design and Performance Analysis of Novel Single-Fin Core Shell Junctionless FinFET (CS-JL-FinFET)","publication_year":2026,"publication_date":"2026-11-09","ids":{"openalex":"https://openalex.org/W7225613586","doi":"https://doi.org/10.21203/rs.3.rs-11139606/v1"},"language":"en","primary_location":{"id":"doi:10.21203/rs.3.rs-11139606/v1","doi":"https://doi.org/10.21203/rs.3.rs-11139606/v1","is_oa":true,"landing_page_url":"https://doi.org/10.21203/rs.3.rs-11139606/v1","pdf_url":"https://www.researchsquare.com/article/rs-11139606/latest.pdf","source":{"id":"https://openalex.org/S4306525896","display_name":"Research Square","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Research Square","raw_type":"posted-content"},"volume":null,"type":"preprint","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://www.researchsquare.com/article/rs-11139606/latest.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5156572416","display_name":"Neeraj Nayan Prakash","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I110360157","display_name":"Lovely Professional University","ror":"https://ror.org/00et6q107","country_code":"IN","type":"education","lineage":["https://openalex.org/I110360157"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Neeraj Nayan Prakash","raw_affiliation_strings":["Lovely Professional University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lovely Professional University","institution_ids":["https://openalex.org/I110360157"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073419986","display_name":"Vishal Narula","orcid":"https://orcid.org/0000-0003-2261-7389","observed_orcids":["https://orcid.org/0000-0003-2261-7389"]},"institutions":[{"id":"https://openalex.org/I110360157","display_name":"Lovely Professional University","ror":"https://ror.org/00et6q107","country_code":"IN","type":"education","lineage":["https://openalex.org/I110360157"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vishal Narula","raw_affiliation_strings":["Lovely Professional University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lovely Professional University","institution_ids":["https://openalex.org/I110360157"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053432366","display_name":"Amit Saini","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Amit Saini","raw_affiliation_strings":["Cadre Design System"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadre Design System","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/junctionless-finfet","display_name":"junctionless FinFET","score":0.949999988079071},{"id":"https://openalex.org/keywords/subthreshold-swing","display_name":"subthreshold swing","score":0.6819999814033508},{"id":"https://openalex.org/keywords/transconductance","display_name":"transconductance","score":0.921999990940094},{"id":"https://openalex.org/keywords/output-conductance","display_name":"output conductance","score":0.7039999961853027},{"id":"https://openalex.org/keywords/leakage-current","display_name":"leakage current","score":0.5350000262260437},{"id":"https://openalex.org/keywords/short-channel-effects","display_name":"short-channel effects","score":0.7710000276565552},{"id":"https://openalex.org/keywords/nanoscale-transistors","display_name":"nanoscale transistors","score":0.7319999933242798},{"id":"https://openalex.org/keywords/inverter-switching","display_name":"inverter switching","score":0.5490000247955322},{"id":"https://openalex.org/keywords/temperature-dependence","display_name":"temperature dependence","score":0.37299999594688416}],"concepts":[{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.7350000143051147},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.6425999999046326},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5656999945640564},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5439000129699707},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4941999912261963},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.45840001106262207},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.45559999346733093},{"id":"https://openalex.org/C103566474","wikidata":"https://www.wikidata.org/wiki/Q7632226","display_name":"Subthreshold slope","level":5,"score":0.4542999863624573},{"id":"https://openalex.org/C57863236","wikidata":"https://www.wikidata.org/wiki/Q1130571","display_name":"Doping","level":2,"score":0.4352000057697296},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42820000648498535},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4108999967575073},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.3727000057697296},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.3725999891757965},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.3359000086784363},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.32670000195503235},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.31839999556541443},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.3003000020980835},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.2702000141143799},{"id":"https://openalex.org/C45206210","wikidata":"https://www.wikidata.org/wiki/Q2415817","display_name":"Nanoscopic scale","level":2,"score":0.26170000433921814},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.25870001316070557},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.2556999921798706}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.21203/rs.3.rs-11139606/v1","doi":"https://doi.org/10.21203/rs.3.rs-11139606/v1","is_oa":true,"landing_page_url":"https://doi.org/10.21203/rs.3.rs-11139606/v1","pdf_url":"https://www.researchsquare.com/article/rs-11139606/latest.pdf","source":{"id":"https://openalex.org/S4306525896","display_name":"Research Square","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Research Square","raw_type":"posted-content"}],"best_oa_location":{"id":"doi:10.21203/rs.3.rs-11139606/v1","doi":"https://doi.org/10.21203/rs.3.rs-11139606/v1","is_oa":true,"landing_page_url":"https://doi.org/10.21203/rs.3.rs-11139606/v1","pdf_url":"https://www.researchsquare.com/article/rs-11139606/latest.pdf","source":{"id":"https://openalex.org/S4306525896","display_name":"Research Square","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Research Square","raw_type":"posted-content"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W7225613586.pdf","grobid_xml":"https://content.openalex.org/works/W7225613586.grobid-xml"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W1938047040","https://openalex.org/W2969459664","https://openalex.org/W3015045251","https://openalex.org/W3018270906","https://openalex.org/W3123674122","https://openalex.org/W4387637990","https://openalex.org/W4393281606","https://openalex.org/W4399940197","https://openalex.org/W4402979021","https://openalex.org/W4405745628","https://openalex.org/W4413872075","https://openalex.org/W4415156162","https://openalex.org/W4415585082","https://openalex.org/W7160385709"],"related_works":["https://openalex.org/W2107737255","https://openalex.org/W2011377725","https://openalex.org/W3214231111","https://openalex.org/W4400096152","https://openalex.org/W2785389665","https://openalex.org/W4408995677","https://openalex.org/W2949193876","https://openalex.org/W4403701234","https://openalex.org/W7160385709","https://openalex.org/W2773268809"],"abstract_inverted_index":{"Abstract":[0],"Aggressive":[1],"scaling":[2],"of":[3,21,134,140,146,162,233],"conventional":[4,73,152,170,202],"field-effect":[5],"transistors":[6],"intensifies":[7],"short-channel":[8],"effects,":[9],"leakage":[10],"current,":[11],"degraded":[12],"electrostatic":[13,59,93],"control":[14],"and":[15,29,63,87,94,101,105,118,136,197,230],"mobility-related":[16],"limitations,":[17],"motivating":[18],"the":[19,57,68,123,127,151,173,201,228],"development":[20],"alternative":[22],"device":[23,51,156],"architectures":[24],"with":[25,76,149,166,210],"improved":[26],"carrier":[27,61],"transport":[28,95],"gate":[30,82],"controllability.":[31],"In":[32],"this":[33],"work,":[34],"a":[35,159,211,223],"single-fin":[36,74],"core-shell":[37,53,219],"junctionless":[38,69,235],"FinFET":[39],"(CS-JL-FinFET)":[40],"is":[41,90,176],"proposed":[42,50,128,155],"using":[43],"three-dimensional":[44],"technology":[45],"computer-aided":[46],"design":[47],"simulations.":[48],"The":[49,92,154,182],"employs":[52],"doping":[54,220],"to":[55,178],"modify":[56],"internal":[58],"potential,":[60],"distribution":[62],"gate-to-channel":[64],"coupling":[65],"while":[66,172],"retaining":[67],"operating":[70,125],"principle.":[71],"A":[72],"JL-FinFET":[75,171],"identical":[77],"fundamental":[78],"dimensions,":[79],"material":[80],"system,":[81],"work":[83],"function,":[84],"bias":[85],"conditions":[86],"simulation":[88],"methodology":[89],"employed.":[91],"characteristics":[96,232],"are":[97],"evaluated":[98],"through":[99],"transfer":[100],"output":[102,109,188,193],"characteristics,":[103],"potential":[104],"electric-field":[106],"distributions,":[107],"transconductance,":[108],"conductance,":[110,189],"capacitance,":[111],"temperature-dependent":[112],"behavior,":[113],"intrinsic":[114,195],"gain,":[115],"Early":[116,198],"voltage":[117,199,208],"circuit-level":[119],"inverter":[120,205],"operation.":[121],"At":[122],"nominal":[124],"condition,":[126],"CS-JL-FinFET":[129],"achieves":[130],"an":[131,137,144],"ON-state":[132],"current":[133,139,184],"\\(\\:{10}^{-5}\\)A/\u00b5m":[135],"OFF-state":[138],"\\(\\:{10}^{-16}\\)A/\u00b5m,":[141],"resulting":[142,190],"in":[143,191],"\\(\\:{I}_{on}/{I}_{off}\\:\\)ratio":[145],"\\(\\:{10}^{11}\\),":[147],"compared":[148,165],"\\(\\:{10}^{10}\\)for":[150],"JL-FinFET.":[153],"also":[157],"shows":[158,206],"subthreshold":[160],"slope":[161],"64":[163],"mV/dec,":[164],"82.7":[167],"mV/dec":[168],"for":[169,226],"peak":[174],"transconductance":[175],"reported":[177],"improve":[179],"by":[180,186],"60-67%.":[181],"enhanced":[183],"modulation":[185],"increased":[187],"lower":[192],"resistance,":[194],"gain":[196],"than":[200],"device.":[203],"Resistive-load":[204],"successful":[207],"inversion":[209],"0-0.5":[212],"V":[213],"input":[214],"swing.":[215],"These":[216],"results":[217],"establish":[218],"engineering":[221],"as":[222],"promising":[224],"approach":[225],"enhancing":[227],"current-driving":[229],"switching":[231],"nanoscale":[234],"FinFET.":[236]},"counts_by_year":[],"updated_date":"2026-11-11T12:16:26.678958","created_date":"2026-11-10T00:00:00"}
