{"id":"https://openalex.org/W7224916161","doi":"https://doi.org/10.48550/arxiv.2610.39699","title":"Implementation and Validation of Mismatch-Tolerant High-Gain OTA with a Calibrated Negative Conductance Load","display_name":"Implementation and Validation of Mismatch-Tolerant High-Gain OTA with a Calibrated Negative Conductance Load","publication_year":2026,"publication_date":"2026-10-29","ids":{"openalex":"https://openalex.org/W7224916161","doi":"https://doi.org/10.48550/arxiv.2610.39699"},"language":"en","primary_location":{"id":"pmh:oai:arXiv.org:2610.39699","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2610.39699","pdf_url":"https://arxiv.org/pdf/2610.39699","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"volume":null,"type":"preprint","indexed_in":["arxiv","datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2610.39699","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5160237809","display_name":"Mayank Aggarwal","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210152718","display_name":"Indian Institute of Technology Dharwad","ror":"https://ror.org/0509djg30","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210152718"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Aggarwal, Mayank","raw_affiliation_strings":["Department of Electrical , Electronics and Communication Engineering Indian Institute of Technology Dharwad , Karnataka - 580011 , India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical , Electronics and Communication Engineering Indian Institute of Technology Dharwad , Karnataka - 580011 , India","institution_ids":["https://openalex.org/I4210152718"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003026786","display_name":"Naveen Kadayinti","orcid":"https://orcid.org/0000-0003-0859-9380","observed_orcids":["https://orcid.org/0000-0003-0859-9380"]},"institutions":[{"id":"https://openalex.org/I4210152718","display_name":"Indian Institute of Technology Dharwad","ror":"https://ror.org/0509djg30","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210152718"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kadayinti, Naveen","raw_affiliation_strings":["Department of Electrical , Electronics and Communication Engineering Indian Institute of Technology Dharwad , Karnataka - 580011 , India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical , Electronics and Communication Engineering Indian Institute of Technology Dharwad , Karnataka - 580011 , India","institution_ids":["https://openalex.org/I4210152718"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210152718"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.0017000000225380063,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.000699999975040555,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"operational transconductance amplifier","score":0.9909999966621399},{"id":"https://openalex.org/keywords/mismatch-tolerance","display_name":"mismatch tolerance","score":0.6430000066757202},{"id":"https://openalex.org/keywords/on-chip-calibration","display_name":"on-chip calibration","score":0.7110000252723694},{"id":"https://openalex.org/keywords/comparator-offset-calibration","display_name":"comparator offset calibration","score":0.7680000066757202},{"id":"https://openalex.org/keywords/capacitive-dac","display_name":"capacitive DAC","score":0.8790000081062317},{"id":"https://openalex.org/keywords/steady-state-error","display_name":"steady-state error","score":0.6069999933242798},{"id":"https://openalex.org/keywords/65-nm-cmos","display_name":"65 nm CMOS","score":0.9179999828338623}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8260999917984009},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.6299999952316284},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.579200029373169},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.536899983882904},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5149000287055969},{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.5073000192642212},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.454800009727478},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4165000021457672},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41429999470710754},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.4097000062465668},{"id":"https://openalex.org/C8171440","wikidata":"https://www.wikidata.org/wiki/Q903414","display_name":"Steady state (chemistry)","level":2,"score":0.4074999988079071},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.40369999408721924},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4034000039100647},{"id":"https://openalex.org/C81455027","wikidata":"https://www.wikidata.org/wiki/Q7180955","display_name":"Phase margin","level":5,"score":0.3840000033378601},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.37139999866485596},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.36329999566078186},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3578000068664551},{"id":"https://openalex.org/C187805909","wikidata":"https://www.wikidata.org/wiki/Q1142401","display_name":"Subtractor","level":4,"score":0.33629998564720154},{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.33230000734329224},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.32499998807907104},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.3237999975681305},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30709999799728394},{"id":"https://openalex.org/C121649978","wikidata":"https://www.wikidata.org/wiki/Q17007408","display_name":"Comparator applications","level":4,"score":0.29580000042915344},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.29249998927116394},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.2913999855518341},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.2874999940395355},{"id":"https://openalex.org/C68742264","wikidata":"https://www.wikidata.org/wiki/Q1736442","display_name":"Current-feedback operational amplifier","level":5,"score":0.2809000015258789},{"id":"https://openalex.org/C198537423","wikidata":"https://www.wikidata.org/wiki/Q259838","display_name":"Multivibrator","level":3,"score":0.2782999873161316},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.27639999985694885},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.2761000096797943},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27090001106262207},{"id":"https://openalex.org/C93586867","wikidata":"https://www.wikidata.org/wiki/Q62527","display_name":"Negative feedback","level":3,"score":0.2705000042915344},{"id":"https://openalex.org/C195766429","wikidata":"https://www.wikidata.org/wiki/Q394","display_name":"Metrology","level":2,"score":0.2556999921798706},{"id":"https://openalex.org/C2775937380","wikidata":"https://www.wikidata.org/wiki/Q1232589","display_name":"Replica","level":2,"score":0.250900000333786}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:arXiv.org:2610.39699","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2610.39699","pdf_url":"https://arxiv.org/pdf/2610.39699","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},{"id":"doi:10.48550/arxiv.2610.39699","doi":"https://doi.org/10.48550/arxiv.2610.39699","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2610.39699","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2610.39699","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2610.39699","pdf_url":"https://arxiv.org/pdf/2610.39699","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W7224916161.pdf","grobid_xml":"https://content.openalex.org/works/W7224916161.grobid-xml"},"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4396564396","https://openalex.org/W1978292060","https://openalex.org/W1607069949","https://openalex.org/W6946076328","https://openalex.org/W2012980928","https://openalex.org/W1501914461","https://openalex.org/W2524945924","https://openalex.org/W2800600829","https://openalex.org/W1886545075","https://openalex.org/W2030604440"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,45,58,62,67,105,121],"circuit-level":[4],"implementation":[5,78],"of":[6,66,104,140],"a":[7,34,48,70,135],"mismatch-tolerant":[8],"high-gain":[9],"operational":[10],"transconductance":[11],"amplifier":[12],"(OTA)":[13],"using":[14,33],"automatic":[15],"negative-conductance":[16],"calibration":[17,41,55,99,145],"in":[18,69],"65-nm":[19],"CMOS.":[20],"The":[21,54,77,143],"technique":[22],"enhances":[23],"OTA":[24,68,113],"gain":[25,59,72,89],"by":[26,60],"compensating":[27],"for":[28,47,111],"its":[29],"finite":[30],"output":[31],"conductance":[32],"cross-coupled":[35],"transistor":[36],"pair,":[37],"with":[38,134],"an":[39],"on-chip":[40],"loop":[42,74],"that":[43,120],"eliminates":[44],"need":[46],"replica":[49],"circuit":[50],"or":[51],"external":[52],"tuning.":[53],"routine":[56],"increases":[57],"driving":[61],"steady":[63,107],"state":[64,108],"error":[65,109],"unity":[71],"feedback":[73],"toward":[75],"zero.":[76],"addresses":[79],"practical":[80],"challenges":[81],"involving":[82],"comparator":[83,97,122],"offset,":[84],"DAC":[85,95],"design,":[86],"and":[87,90,149],"subtractor":[88],"offset.":[91],"A":[92],"6-bit":[93],"capacitive":[94],"(CDAC)-based":[96],"offset":[98,123,139],"scheme":[100],"enables":[101],"reliable":[102],"detection":[103],"sub-millivolt":[106],"required":[110],"high":[112],"gain.":[114],"Post-layout":[115],"Monte":[116],"Carlo":[117],"simulations":[118],"show":[119],"standard":[124],"deviation":[125],"is":[126,147],"reduced":[127],"from":[128],"4.11":[129],"mV":[130],"to":[131],"132":[132],"$\u03bc$V,":[133],"maximum":[136],"observed":[137],"post-calibration":[138],"625":[141],"$\u03bc$V.":[142],"complete":[144],"circuitry":[146],"implemented":[148],"evaluated":[150],"through":[151],"post-layout":[152],"simulations.":[153]},"counts_by_year":[],"updated_date":"2026-11-02T09:45:03.842371","created_date":"2026-10-31T00:00:00"}