{"id":"https://openalex.org/W7223671955","doi":"https://doi.org/10.55041/isjem08728","title":"Low-Power High-Speed Sense-Amplifier- Based Flipflops with Conditional Bridging Using Tanner Eda.","display_name":"Low-Power High-Speed Sense-Amplifier- Based Flipflops with Conditional Bridging Using Tanner Eda.","publication_year":2026,"publication_date":"2026-10-26","ids":{"openalex":"https://openalex.org/W7223671955","doi":"https://doi.org/10.55041/isjem08728"},"language":"en","primary_location":{"id":"doi:10.55041/isjem08728","doi":"https://doi.org/10.55041/isjem08728","is_oa":false,"landing_page_url":"https://doi.org/10.55041/isjem08728","pdf_url":null,"source":{"id":"https://openalex.org/S4387287997","display_name":"International Scientific Journal of Engineering and Management","issn_l":"2583-6129","issn":["2583-6129"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Scientific Journal of Engineering and Management","raw_type":"journal-article"},"volume":null,"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103265068","display_name":"Gorla Babu","orcid":"https://orcid.org/0000-0001-5210-6147","observed_orcids":["https://orcid.org/0000-0001-5210-6147"]},"institutions":[{"id":"https://openalex.org/I2800401362","display_name":"Government of Andhra Pradesh","ror":"https://ror.org/045mrnd19","country_code":"IN","type":"government","lineage":["https://openalex.org/I2800401362"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"GORLA BABU","raw_affiliation_strings":["Lecturer in Electronics and Communication Engg., Govt. Polytechnic, Proddatur,  Andhra Pradesh, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lecturer in Electronics and Communication Engg., Govt. Polytechnic, Proddatur,  Andhra Pradesh, India","institution_ids":["https://openalex.org/I2800401362"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5103265068"],"corresponding_institution_ids":["https://openalex.org/I2800401362"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.74390426,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"05","issue":"10","first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flip-flops","display_name":"flip-flops","score":0.8040000200271606},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"sense amplifier","score":0.7860000133514404},{"id":"https://openalex.org/keywords/subthreshold-operation","display_name":"subthreshold operation","score":0.8450000286102295},{"id":"https://openalex.org/keywords/low-power-vlsi-design","display_name":"low-power VLSI design","score":0.7860000133514404},{"id":"https://openalex.org/keywords/power-delay-product","display_name":"power-delay product","score":0.7730000019073486},{"id":"https://openalex.org/keywords/pulse-triggered-flip-flop","display_name":"pulse-triggered flip-flop","score":0.8029999732971191}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6007999777793884},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5845999717712402},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5641000270843506},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5623000264167786},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.5049999952316284},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4828999936580658},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44749999046325684},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.436599999666214},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.4293999969959259},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4171999990940094},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3763999938964844},{"id":"https://openalex.org/C3017773396","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Ultra low power","level":4,"score":0.34200000762939453},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.33399999141693115},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.33180001378059387},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.3192000091075897},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30320000648498535},{"id":"https://openalex.org/C2983317576","wikidata":"https://www.wikidata.org/wiki/Q1853339","display_name":"Power demand","level":4,"score":0.2736999988555908},{"id":"https://openalex.org/C2776502983","wikidata":"https://www.wikidata.org/wiki/Q690182","display_name":"Contrast (vision)","level":2,"score":0.26589998602867126},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.26420000195503235},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.262800008058548},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.2533000111579895},{"id":"https://openalex.org/C118993495","wikidata":"https://www.wikidata.org/wiki/Q5042828","display_name":"Electrical efficiency","level":3,"score":0.25029999017715454}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.55041/isjem08728","doi":"https://doi.org/10.55041/isjem08728","is_oa":false,"landing_page_url":"https://doi.org/10.55041/isjem08728","pdf_url":null,"source":{"id":"https://openalex.org/S4387287997","display_name":"International Scientific Journal of Engineering and Management","issn_l":"2583-6129","issn":["2583-6129"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Scientific Journal of Engineering and Management","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4359000027179718,"display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W7125918736","https://openalex.org/W4408048113","https://openalex.org/W2189239422","https://openalex.org/W2104408907","https://openalex.org/W2002083281","https://openalex.org/W2086704664","https://openalex.org/W2129412844","https://openalex.org/W4388017381","https://openalex.org/W4416175797","https://openalex.org/W7096557458"],"abstract_inverted_index":{"One":[0,65],"of":[1,67,76],"the":[2,23,74,94,107],"major":[3],"challenges":[4],"in":[5,48,101],"modern":[6],"VLSI":[7],"design":[8],"is":[9,70],"power":[10,53,90,109,111,116,120],"consumption,":[11],"right":[12],"up":[13],"there":[14],"with":[15],"space":[16],"and":[17,30,39,43,114,123],"performance.":[18],"Digital":[19],"systems":[20],"rely":[21],"on":[22],"flip-flop.":[24],"In":[25],"sub-threshold":[26],"operation,":[27],"we":[28],"examine":[29],"contrast":[31],"four":[32],"different":[33],"flip-flop":[34],"topologies:":[35],"IP-DCO,":[36],"MHLFF,":[37],"CPSFF,":[38],"CPFF.":[40],"Both":[41],"pulse-triggered":[42],"conditional":[44],"approaches":[45],"are":[46,56],"included":[47],"these":[49],"topologies.":[50],"Very":[51],"low":[52],"consumption":[54],"applications":[55],"now":[57],"within":[58],"reach,":[59],"thanks":[60],"to":[61,80],"sub":[62],"threshold":[63],"technology.":[64],"advantage":[66],"this":[68],"technique":[69],"that":[71],"it":[72],"decreases":[73],"number":[75],"power-hungry":[77],"flip-flops.":[78],"Compared":[79],"a":[81,85,118],"strong":[82],"inversion":[83],"circuit,":[84],"subthreshold":[86],"circuit":[87],"consumes":[88],"less":[89],"while":[91],"running":[92],"at":[93,117,125],"same":[95],"frequency.":[96],"Tanner":[97],"uses":[98],"18nm":[99],"technology":[100],"cmos":[102],"for":[103],"design.":[104],"We":[105],"test":[106],"flip-flops'":[108],"delay,":[110],"delay":[112],"product,":[113],"average":[115],"1V":[119],"supply":[121],"voltage":[122],"look":[124],"them":[126],"from":[127],"every":[128],"perspective.":[129],"Keywords:":[130],"Sub":[131],"Threshold":[132],"Technology,":[133],"Flip":[134],"Flop,":[135],"Low":[136],"Power.":[137]},"counts_by_year":[],"updated_date":"2026-10-29T09:56:32.521200","created_date":"2026-10-27T00:00:00"}
