{"id":"https://openalex.org/W7214784985","doi":"https://doi.org/10.48550/arxiv.2609.35254","title":"MEGATRON: a 28nm Analog PCM CiM/Digital System-on-Chip for Edge GenAI at 57.5 TOPS/W and 1.52 Mparam/mm${}^2$","display_name":"MEGATRON: a 28nm Analog PCM CiM/Digital System-on-Chip for Edge GenAI at 57.5 TOPS/W and 1.52 Mparam/mm${}^2$","publication_year":2026,"publication_date":"2026-09-28","ids":{"openalex":"https://openalex.org/W7214784985","doi":"https://doi.org/10.48550/arxiv.2609.35254"},"language":"en","primary_location":{"id":"pmh:oai:arXiv.org:2609.35254","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2609.35254","pdf_url":"https://arxiv.org/pdf/2609.35254","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"volume":null,"type":"preprint","is_traditional":true,"indexed_in":["arxiv","datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2609.35254","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054770753","display_name":"Alessandro Nadalini","orcid":"https://orcid.org/0009-0007-3574-7576","observed_orcids":["https://orcid.org/0009-0007-3574-7576"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Nadalini, Alessandro","raw_affiliation_strings":["University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052915995","display_name":"Angelo Garofalo","orcid":"https://orcid.org/0000-0002-7495-6895","observed_orcids":["https://orcid.org/0000-0002-7495-6895"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Garofalo, Angelo","raw_affiliation_strings":["University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5117907139","display_name":"Lorenzo Greco","orcid":"https://orcid.org/0009-0003-3906-6007","observed_orcids":["https://orcid.org/0009-0003-3906-6007"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Greco, Lorenzo","raw_affiliation_strings":["University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115087249","display_name":"Andrea Belano","orcid":"https://orcid.org/0009-0005-8576-3502","observed_orcids":["https://orcid.org/0009-0005-8576-3502"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Belano, Andrea","raw_affiliation_strings":["Chips-IT , Italy,","University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chips-IT , Italy,","institution_ids":[]},{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043380728","display_name":"Alessio Antolini","orcid":"https://orcid.org/0000-0003-0952-3839","observed_orcids":["https://orcid.org/0000-0003-0952-3839"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Antolini, Alessio","raw_affiliation_strings":["University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065394768","display_name":"Francesco Zavalloni","orcid":"https://orcid.org/0000-0003-0103-8126","observed_orcids":["https://orcid.org/0000-0003-0103-8126"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Zavalloni, Francesco","raw_affiliation_strings":["University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006883881","display_name":"Andrea Lico","orcid":"https://orcid.org/0000-0001-5267-2421","observed_orcids":["https://orcid.org/0000-0001-5267-2421"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lico, Andrea","raw_affiliation_strings":["Chips-IT , Italy,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chips-IT , Italy,","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065446466","display_name":"Riccardo Zurla","orcid":"https://orcid.org/0000-0002-4315-1269","observed_orcids":["https://orcid.org/0000-0002-4315-1269"]},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Zurla, Riccardo","raw_affiliation_strings":["STMicroelectronics , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics , Italy ,","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045595331","display_name":"Emanuela Calvetti","orcid":"https://orcid.org/0009-0009-5271-3938","observed_orcids":["https://orcid.org/0009-0009-5271-3938"]},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Calvetti, Emanuela","raw_affiliation_strings":["STMicroelectronics , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics , Italy ,","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066502435","display_name":"Luigi Croce","orcid":"https://orcid.org/0000-0001-5400-1429","observed_orcids":["https://orcid.org/0000-0001-5400-1429"]},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Croce, Luigi","raw_affiliation_strings":["STMicroelectronics , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics , Italy ,","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091318325","display_name":"Marco Pasotti","orcid":"https://orcid.org/0000-0003-4988-9982","observed_orcids":["https://orcid.org/0000-0003-4988-9982"]},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Pasotti, Marco","raw_affiliation_strings":["STMicroelectronics , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics , Italy ,","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5153551410","display_name":"Alessandro Cabrini","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I25217355","display_name":"University of Pavia","ror":"https://ror.org/00s6t1f81","country_code":"IT","type":"education","lineage":["https://openalex.org/I25217355"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Cabrini, Alessandro","raw_affiliation_strings":["University of Pavia , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Pavia , Italy ,","institution_ids":["https://openalex.org/I25217355"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087194868","display_name":"Eleonora Franchi Scarselli","orcid":"https://orcid.org/0000-0001-6994-2088","observed_orcids":["https://orcid.org/0000-0001-6994-2088"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Scarselli, Eleonora Franchi","raw_affiliation_strings":["University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023905268","display_name":"Davide Rossi","orcid":"https://orcid.org/0000-0002-0651-5393","observed_orcids":["https://orcid.org/0000-0002-0651-5393","https://orcid.org/0000-0002-9221-4633"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Rossi, Davide","raw_affiliation_strings":["Chips-IT , Italy,","University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chips-IT , Italy,","institution_ids":[]},{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038717922","display_name":"Francesco Conti","orcid":"https://orcid.org/0000-0002-7924-933X","observed_orcids":["https://orcid.org/0000-0002-7924-933X"]},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Conti, Francesco","raw_affiliation_strings":["Chips-IT , Italy,","University of Bologna , Italy ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chips-IT , Italy,","institution_ids":[]},{"raw_affiliation_string":"University of Bologna , Italy ,","institution_ids":["https://openalex.org/I9360294"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.002899999963119626,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.0008999999845400453,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/in-memory-computing","display_name":"in-memory computing","score":0.7310000061988831},{"id":"https://openalex.org/keywords/phase-change-memory","display_name":"phase-change memory","score":0.9800000190734863},{"id":"https://openalex.org/keywords/system-on-chip","display_name":"system-on-chip","score":0.6990000009536743},{"id":"https://openalex.org/keywords/risc-v","display_name":"RISC-V","score":0.6039999723434448},{"id":"https://openalex.org/keywords/energy-efficiency","display_name":"energy efficiency","score":0.5410000085830688},{"id":"https://openalex.org/keywords/28nm-fdsoi","display_name":"28nm FDSOI","score":0.7089999914169312},{"id":"https://openalex.org/keywords/heterogeneous-integration","display_name":"heterogeneous integration","score":0.4569999873638153}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6022999882698059},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.5873000025749207},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.529699981212616},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4830000102519989},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41819998621940613},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.3874000012874603},{"id":"https://openalex.org/C138236772","wikidata":"https://www.wikidata.org/wiki/Q25098575","display_name":"Edge device","level":3,"score":0.3862999975681305},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.3619000017642975},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.36149999499320984},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3601999878883362},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.32600000500679016},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.3077999949455261},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3059999942779541},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.30550000071525574},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3034999966621399},{"id":"https://openalex.org/C2985529240","wikidata":"https://www.wikidata.org/wiki/Q193395","display_name":"Digital storage","level":2,"score":0.30230000615119934},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.301800012588501},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.3000999987125397},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.2793000042438507},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.2766999900341034},{"id":"https://openalex.org/C90915687","wikidata":"https://www.wikidata.org/wiki/Q63759","display_name":"Analog computer","level":2,"score":0.2709999978542328},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.26570001244544983},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.26179999113082886},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.26179999113082886},{"id":"https://openalex.org/C18789546","wikidata":"https://www.wikidata.org/wiki/Q1341206","display_name":"Hybrid computer","level":2,"score":0.2574999928474426},{"id":"https://openalex.org/C141400236","wikidata":"https://www.wikidata.org/wiki/Q1479544","display_name":"Nanoelectronics","level":2,"score":0.2547999918460846},{"id":"https://openalex.org/C193536780","wikidata":"https://www.wikidata.org/wiki/Q1513153","display_name":"Edge detection","level":4,"score":0.2540999948978424},{"id":"https://openalex.org/C194739806","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Computer data storage","level":2,"score":0.2508000135421753}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:arXiv.org:2609.35254","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2609.35254","pdf_url":"https://arxiv.org/pdf/2609.35254","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},{"id":"doi:10.48550/arxiv.2609.35254","doi":"https://doi.org/10.48550/arxiv.2609.35254","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2609.35254","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2609.35254","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2609.35254","pdf_url":"https://arxiv.org/pdf/2609.35254","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W7214784985.pdf","grobid_xml":"https://content.openalex.org/works/W7214784985.grobid-xml"},"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4399486048","https://openalex.org/W7117726192","https://openalex.org/W7117819015","https://openalex.org/W7133293583","https://openalex.org/W7205857467","https://openalex.org/W4407693318","https://openalex.org/W4403676796","https://openalex.org/W7162117322","https://openalex.org/W4385217898","https://openalex.org/W7118217089"],"abstract_inverted_index":{"We":[0],"present":[1],"MEGATRON,":[2],"a":[3,14,21,28,51],"heterogeneous":[4],"Edge":[5],"GenAI":[6],"System-on-Chip":[7],"in":[8],"28nm":[9],"FD-SOI":[10],"CMOS":[11],"technology":[12],"combining":[13],"non-volatile":[15],"analog":[16],"in-memory-computing":[17],"engine":[18],"based":[19],"on":[20],"4Mi-cell":[22],"phase-change":[23],"memory":[24],"(PCM)":[25],"array":[26],"with":[27,48,57],"digital":[29],"RISC-V-based":[30],"flexible":[31],"neural":[32],"processing":[33],"unit.":[34],"MEGATRON":[35],"demonstrates":[36],"up":[37],"to":[38],"3.5":[39],"TOPS/W":[40,47],"using":[41],"the":[42],"RISC-V":[43],"processors":[44],"and":[45],"57.5":[46],"PCiM,":[49],"at":[50],"storage":[52],"density":[53],"of":[54],"1.52":[55],"Mparam/mm${}^2$":[56],"4-bit":[58],"effective":[59],"weight":[60],"precision.":[61]},"counts_by_year":[],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2026-09-30T00:00:00"}