{"id":"https://openalex.org/W7204582858","doi":"https://doi.org/10.1109/led.2026.3728647","title":"A Stacked Top Select Gate Architecture for High-Density 3-D nand Flash","display_name":"A Stacked Top Select Gate Architecture for High-Density 3-D nand Flash","publication_year":2026,"publication_date":"2026-08-28","ids":{"openalex":"https://openalex.org/W7204582858","doi":"https://doi.org/10.1109/led.2026.3728647"},"language":"en","primary_location":{"id":"doi:10.1109/led.2026.3728647","doi":"https://doi.org/10.1109/led.2026.3728647","is_oa":true,"landing_page_url":"https://doi.org/10.1109/led.2026.3728647","pdf_url":null,"source":{"id":"https://openalex.org/S19887683","display_name":"IEEE Electron Device Letters","issn_l":"0741-3106","issn":["0741-3106","1558-0563"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-2","norway-1","poland-140","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Electron Device Letters","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1109/led.2026.3728647","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5159587270","display_name":"Ming Zeng","orcid":"https://orcid.org/0009-0006-4461-1147","observed_orcids":["https://orcid.org/0009-0006-4461-1147"]},"institutions":[{"id":"https://openalex.org/I47720641","display_name":"Huazhong University of Science and Technology","ror":"https://ror.org/00p991c53","country_code":"CN","type":"education","lineage":["https://openalex.org/I47720641"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Zeng","raw_affiliation_strings":["Huazhong University of Science and Technology"],"raw_orcid":"https://orcid.org/0009-0006-4461-1147","affiliations":[{"raw_affiliation_string":"Huazhong University of Science and Technology","institution_ids":["https://openalex.org/I47720641"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011826297","display_name":"Jianquan Jia","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jianquan Jia","raw_affiliation_strings":["Yangtze Memory Technologies Company Ltd"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yangtze Memory Technologies Company Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100342341","display_name":"Kun Zhang","orcid":"https://orcid.org/0000-0002-4984-5827","observed_orcids":["https://orcid.org/0000-0002-4984-5827","https://orcid.org/0009-0002-8520-1874"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kun Zhang","raw_affiliation_strings":["Yangtze Memory Technologies Company Ltd"],"raw_orcid":"https://orcid.org/0009-0002-8520-1874","affiliations":[{"raw_affiliation_string":"Yangtze Memory Technologies Company Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008858273","display_name":"Hengbo Xiao","orcid":"https://orcid.org/0009-0008-8283-4813","observed_orcids":["https://orcid.org/0009-0008-8283-4813"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hengbo Xiao","raw_affiliation_strings":["Yangtze Memory Technologies Company Ltd"],"raw_orcid":"https://orcid.org/0009-0008-8283-4813","affiliations":[{"raw_affiliation_string":"Yangtze Memory Technologies Company Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125195404","display_name":"Changtian Cao","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Changtian Cao","raw_affiliation_strings":["Yangtze Memory Technologies Company Ltd"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yangtze Memory Technologies Company Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024360832","display_name":"Huajun Sun","orcid":"https://orcid.org/0000-0003-0755-5247","observed_orcids":["https://orcid.org/0000-0003-0755-5247"]},"institutions":[{"id":"https://openalex.org/I47720641","display_name":"Huazhong University of Science and Technology","ror":"https://ror.org/00p991c53","country_code":"CN","type":"education","lineage":["https://openalex.org/I47720641"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huajun Sun","raw_affiliation_strings":["Huazhong University of Science and Technology"],"raw_orcid":"https://orcid.org/0000-0003-0755-5247","affiliations":[{"raw_affiliation_string":"Huazhong University of Science and Technology","institution_ids":["https://openalex.org/I47720641"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044308493","display_name":"Zongliang Huo","orcid":"https://orcid.org/0000-0002-9845-5649","observed_orcids":["https://orcid.org/0000-0002-9845-5649"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zongliang Huo","raw_affiliation_strings":["Yangtze Memory Technologies Company Ltd"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yangtze Memory Technologies Company Ltd","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":{"value":2645,"currency":"USD","value_usd":2645},"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"47","issue":"11","first_page":"2195","last_page":"2198"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.8223000168800354,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.8223000168800354,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.09619999676942825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.05869999900460243,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/3d-nand-flash-memory","display_name":"3D NAND flash memory","score":0.8569999933242798},{"id":"https://openalex.org/keywords/storage-density","display_name":"storage density","score":0.4819999933242798}],"concepts":[{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.6614999771118164},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5799999833106995},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.5375000238418579},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.49149999022483826},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4142000079154968},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37549999356269836},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37459999322891235},{"id":"https://openalex.org/C141400236","wikidata":"https://www.wikidata.org/wiki/Q1479544","display_name":"Nanoelectronics","level":2,"score":0.3499000072479248},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3474999964237213},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.3345000147819519},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.33059999346733093},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.32820001244544983},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.32690000534057617},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3188999891281128},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3125999867916107},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.31139999628067017},{"id":"https://openalex.org/C47820740","wikidata":"https://www.wikidata.org/wiki/Q1967079","display_name":"National Electrical Code","level":2,"score":0.3052000105381012},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3034999966621399},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2935999929904938},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.28349998593330383},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.27300000190734863},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.26840001344680786},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.26750001311302185},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.25769999623298645},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2574999928474426},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.25440001487731934}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/led.2026.3728647","doi":"https://doi.org/10.1109/led.2026.3728647","is_oa":true,"landing_page_url":"https://doi.org/10.1109/led.2026.3728647","pdf_url":null,"source":{"id":"https://openalex.org/S19887683","display_name":"IEEE Electron Device Letters","issn_l":"0741-3106","issn":["0741-3106","1558-0563"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-2","norway-1","poland-140","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Electron Device Letters","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/led.2026.3728647","doi":"https://doi.org/10.1109/led.2026.3728647","is_oa":true,"landing_page_url":"https://doi.org/10.1109/led.2026.3728647","pdf_url":null,"source":{"id":"https://openalex.org/S19887683","display_name":"IEEE Electron Device Letters","issn_l":"0741-3106","issn":["0741-3106","1558-0563"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-2","norway-1","poland-140","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Electron Device Letters","raw_type":"journal-article"},"sustainable_development_goals":[],"study_designs":[],"awards":[{"id":"https://openalex.org/G3018545633","display_name":null,"funder_award_id":"62474074","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2804918778","https://openalex.org/W2902492827","https://openalex.org/W2996877977","https://openalex.org/W4281568781","https://openalex.org/W4285227071","https://openalex.org/W4380302442","https://openalex.org/W4391622531","https://openalex.org/W4409433417","https://openalex.org/W4411233219","https://openalex.org/W4412964166","https://openalex.org/W7162426238"],"related_works":["https://openalex.org/W349235619","https://openalex.org/W2616246065","https://openalex.org/W2976617812","https://openalex.org/W3036367498","https://openalex.org/W3143406490","https://openalex.org/W2797807497","https://openalex.org/W2324526055","https://openalex.org/W2289495474","https://openalex.org/W3092801966","https://openalex.org/W1972569198"],"abstract_inverted_index":{"In":[0],"the":[1,9,47,66],"pursuit":[2],"of":[3],"higher":[4],"density":[5],"3Dnandflash":[6],"memory":[7],"arrays,":[8],"\u201csacrificial":[10,58],"holes\u201d":[11,59],"necessitated":[12],"by":[13],"traditional":[14],"top":[15],"select":[16],"gate":[17],"(TSG)":[18],"for":[19],"solid":[20,74],"isolation":[21,54],"present":[22],"an":[23,40],"enduring":[24],"challenge":[25],"to":[26,49,52],"scaling.":[27],"To":[28],"overcome":[29],"this":[30,32],"barrier,":[31],"study":[33],"proposes":[34],"a":[35,73],"novel":[36],"TSG":[37],"architecture":[38,68],"featuring":[39],"independent":[41],"stack":[42],"design,":[43],"which":[44],"can":[45],"reduce":[46],"channel":[48,76],"dielectric":[50],"spacing":[51],"satisfy":[53],"requirements":[55],"while":[56],"eliminating":[57],"and":[60],"significantly":[61],"increasing":[62],"storage":[63],"density.":[64],"Furthermore,":[65],"proposed":[67],"follows":[69],"standard":[70],"design":[71],"with":[72],"polysilicon":[75],"structure,":[77],"relieving":[78],"complex":[79],"process":[80],"demands.":[81]},"counts_by_year":[],"updated_date":"2026-11-08T12:12:28.789561","created_date":"2026-08-29T00:00:00"}