{"id":"https://openalex.org/W7204279789","doi":"https://doi.org/10.48550/arxiv.2608.23630","title":"FPGAgent: An LLM-Assisted Framework for Autonomous HLS Code Generation and Verification in FPGA Environments","display_name":"FPGAgent: An LLM-Assisted Framework for Autonomous HLS Code Generation and Verification in FPGA Environments","publication_year":2026,"publication_date":"2026-08-23","ids":{"openalex":"https://openalex.org/W7204279789","doi":"https://doi.org/10.48550/arxiv.2608.23630"},"language":"en","primary_location":{"id":"pmh:oai:arXiv.org:2608.23630","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2608.23630","pdf_url":"https://arxiv.org/pdf/2608.23630","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"volume":null,"type":"preprint","indexed_in":["arxiv","datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2608.23630","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5148350785","display_name":"Tianyu Wang","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wang, Tianyu","raw_affiliation_strings":["Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5148270843","display_name":"Wenjie Wang","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wang, Wenjie","raw_affiliation_strings":["Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127961652","display_name":"Jianguo Yao","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yao, Jianguo","raw_affiliation_strings":["Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127989087","display_name":"Haibing Guan","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guan, Haibing","raw_affiliation_strings":["Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5147963176","display_name":"Xijun Li","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li, Xijun","raw_affiliation_strings":["Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shanghai Key Laboratory of Scalable Computing and Systems School of Computer Science , Shanghai Jiao Tong University Shanghai , China","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"high-level synthesis","score":0.9210000038146973},{"id":"https://openalex.org/keywords/large-language-models","display_name":"large language models","score":0.7850000262260437},{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.699999988079071},{"id":"https://openalex.org/keywords/multi-agent-framework","display_name":"multi-agent framework","score":0.718999981880188},{"id":"https://openalex.org/keywords/code-generation","display_name":"code generation","score":0.7080000042915344},{"id":"https://openalex.org/keywords/code-verification","display_name":"code verification","score":0.7080000042915344},{"id":"https://openalex.org/keywords/functional-correctness","display_name":"functional correctness","score":0.5600000023841858},{"id":"https://openalex.org/keywords/evolutionary-search","display_name":"evolutionary search","score":0.6230000257492065}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8141000270843506},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7401999831199646},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.7013999819755554},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5322999954223633},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.5083000063896179},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.48559999465942383},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.46129998564720154},{"id":"https://openalex.org/C133162039","wikidata":"https://www.wikidata.org/wiki/Q1061077","display_name":"Code generation","level":3,"score":0.4546000063419342},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4372999966144562},{"id":"https://openalex.org/C170130773","wikidata":"https://www.wikidata.org/wiki/Q216378","display_name":"Usability","level":2,"score":0.427700012922287},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.4239000082015991},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.40119999647140503},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3797999918460846},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3192000091075897},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.29170000553131104},{"id":"https://openalex.org/C43126263","wikidata":"https://www.wikidata.org/wiki/Q128751","display_name":"Source code","level":2,"score":0.28049999475479126},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.2766999900341034},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.26460000872612},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.2639000117778778},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.25850000977516174},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.2565999925136566}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:arXiv.org:2608.23630","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2608.23630","pdf_url":"https://arxiv.org/pdf/2608.23630","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},{"id":"doi:10.48550/arxiv.2608.23630","doi":"https://doi.org/10.48550/arxiv.2608.23630","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.2608.23630","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Preprint"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2608.23630","doi":null,"is_oa":true,"landing_page_url":"https://arxiv.org/abs/2608.23630","pdf_url":"https://arxiv.org/pdf/2608.23630","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W7204279789.pdf","grobid_xml":"https://content.openalex.org/works/W7204279789.grobid-xml"},"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W7126120678","https://openalex.org/W4403060125","https://openalex.org/W4413442542","https://openalex.org/W7128408312","https://openalex.org/W7202140419","https://openalex.org/W7212187774","https://openalex.org/W4413156395","https://openalex.org/W7117560091","https://openalex.org/W4417522037","https://openalex.org/W4409285500"],"abstract_inverted_index":{"Large":[0],"language":[1],"models":[2],"(LLMs)":[3],"have":[4],"shown":[5],"substantial":[6],"promise":[7],"for":[8,75,146],"high-level":[9],"synthesis":[10,22,36],"(HLS)":[11],"code":[12,31,145],"generation,":[13],"but":[14],"most":[15],"existing":[16,183],"approaches":[17],"validate":[18],"only":[19],"simulation":[20,34],"or":[21],"results.":[23],"Because":[24],"of":[25,52,86,212,220],"timing":[26],"and":[27,35,112,137,148,172,197,216],"place-and-route":[28],"constraints,":[29],"\\emph{HLS":[30],"that":[32,205],"passes":[33],"may":[37],"still":[38],"fail":[39],"to":[40,59,71,116,130],"produce":[41],"deployable,":[42],"runnable":[43],"designs":[44],"on":[45,99,151,162,176,192],"real":[46,72,178],"FPGA":[47,73,152,179],"platforms}.":[48],"Moreover,":[49],"the":[50,84,187,209,218],"lack":[51],"public":[53],"benchmarks":[54],"has":[55],"limited":[56],"many":[57],"evaluations":[58],"small,":[60],"self-curated":[61],"test":[62],"suites.":[63],"We":[64,154],"propose":[65],"FPGAgent,":[66],"a":[67,100,104,126,164,177],"multi-agent":[68],"framework":[69,96],"tailored":[70],"environments":[74],"autonomous":[76],"HLS":[77,94,120,214],"coding":[78],"with":[79,158,182],"end-to-end":[80,221],"executability":[81,175,194],"validation.":[82,222],"To":[83],"best":[85],"our":[87],"knowledge,":[88],"FPGAgent":[89,108,157,185,206],"is":[90],"\\emph{the":[91],"first":[92],"task-specification-to-executable":[93],"generation":[95,215],"experimentally":[97],"validated":[98],"well-established":[101],"benchmark}.":[102],"Given":[103],"natural-language":[105],"task":[106],"specification,":[107],"injects":[109],"HLS-specific":[110],"knowledge":[111],"employs":[113],"evolutionary":[114],"search":[115],"iteratively":[117],"derive":[118],"reliable":[119],"kernel":[121],"implementations.":[122],"It":[123],"then":[124],"generates":[125],"C++":[127],"validation":[128],"program":[129],"verify":[131,173],"functional":[132,198],"correctness,":[133],"diagnoses":[134],"potential":[135],"defects,":[136],"guides":[138],"targeted":[139],"repairs.":[140],"Finally,":[141],"it":[142],"synthesizes":[143],"host":[144],"compilation":[147],"board-level":[149,174],"execution":[150],"hardware.":[153],"comprehensively":[155],"evaluate":[156],"five":[159],"established":[160],"LLMs":[161],"HLS-Eval,":[163],"benchmark":[165],"containing":[166],"78":[167],"tasks":[168],"across":[169],"multiple":[170],"domains,":[171],"platform.":[180],"Compared":[181],"baselines,":[184],"improves":[186,208],"synthesizable":[188],"rate":[189],"by":[190,195,200],"16.9%":[191],"average,":[193],"26.7%,":[196],"correctness":[199],"30.6%.":[201],"These":[202],"results":[203],"show":[204],"substantially":[207],"practical":[210],"usability":[211],"LLM-based":[213],"demonstrates":[217],"value":[219]},"counts_by_year":[],"updated_date":"2026-10-28T10:33:24.094632","created_date":"2026-08-27T00:00:00"}
