{"id":"https://openalex.org/W7204272582","doi":"https://doi.org/10.26240/heal.ntua.33323","title":"RTL Design and Analysis of Sparse Tensor Cores for Unstructured sparsity in RISC-V GPUs","display_name":"RTL Design and Analysis of Sparse Tensor Cores for Unstructured sparsity in RISC-V GPUs","publication_year":2026,"publication_date":"2026-08-26","ids":{"openalex":"https://openalex.org/W7204272582","doi":"https://doi.org/10.26240/heal.ntua.33323"},"language":"en","primary_location":{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/65629","doi":null,"is_oa":true,"landing_page_url":"https://dspace.lib.ntua.gr/xmlui/handle/123456789/65629","pdf_url":"https://dspace.lib.ntua.gr/xmlui/bitstream/123456789/65629/1/thesis.pdf","source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null},"volume":null,"type":"article","indexed_in":["datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://dspace.lib.ntua.gr/xmlui/bitstream/123456789/65629/1/thesis.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101998633","display_name":"Georgios Triantafyllou","orcid":"https://orcid.org/0009-0001-2807-9211","observed_orcids":["https://orcid.org/0009-0001-2807-9211"]},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Triantafyllou, Georgios","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":["https://openalex.org/A5101998633"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.63448528,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8115000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8115000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.05270000174641609,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.028599999845027924,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/unstructured-sparsity","display_name":"unstructured sparsity","score":0.8830000162124634},{"id":"https://openalex.org/keywords/risc-v","display_name":"RISC-V","score":0.7390000224113464},{"id":"https://openalex.org/keywords/gpu-architecture","display_name":"GPU architecture","score":0.7929999828338623},{"id":"https://openalex.org/keywords/rtl-design","display_name":"RTL design","score":0.8849999904632568},{"id":"https://openalex.org/keywords/sparse-matrix-computations","display_name":"sparse matrix computations","score":0.621999979019165},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"hardware acceleration","score":0.4000000059604645}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6448000073432922},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4699999988079071},{"id":"https://openalex.org/C155281189","wikidata":"https://www.wikidata.org/wiki/Q3518150","display_name":"Tensor (intrinsic definition)","level":2,"score":0.39500001072883606},{"id":"https://openalex.org/C56372850","wikidata":"https://www.wikidata.org/wiki/Q1050404","display_name":"Sparse matrix","level":3,"score":0.3553999960422516},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3199999928474426},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.31839999556541443},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.31060001254081726},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30709999799728394},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.30219998955726624},{"id":"https://openalex.org/C124066611","wikidata":"https://www.wikidata.org/wiki/Q28684319","display_name":"Sparse approximation","level":2,"score":0.2883000075817108},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2881999909877777},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.2793000042438507},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.27639999985694885},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.27489998936653137},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.2703000009059906},{"id":"https://openalex.org/C36464697","wikidata":"https://www.wikidata.org/wiki/Q451553","display_name":"Visualization","level":2,"score":0.2612000107765198},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.25839999318122864},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.25519999861717224},{"id":"https://openalex.org/C106516650","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm design","level":2,"score":0.25360000133514404}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/65629","doi":null,"is_oa":true,"landing_page_url":"https://dspace.lib.ntua.gr/xmlui/handle/123456789/65629","pdf_url":"https://dspace.lib.ntua.gr/xmlui/bitstream/123456789/65629/1/thesis.pdf","source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null},{"id":"doi:10.26240/heal.ntua.33323","doi":"https://doi.org/10.26240/heal.ntua.33323","is_oa":true,"landing_page_url":"https://doi.org/10.26240/heal.ntua.33323","pdf_url":null,"source":{"id":"https://openalex.org/S7407051627","display_name":"National Technical University of Athens (NTUA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Other"}],"best_oa_location":{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/65629","doi":null,"is_oa":true,"landing_page_url":"https://dspace.lib.ntua.gr/xmlui/handle/123456789/65629","pdf_url":"https://dspace.lib.ntua.gr/xmlui/bitstream/123456789/65629/1/thesis.pdf","source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null},"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W7204272582.pdf","grobid_xml":"https://content.openalex.org/works/W7204272582.grobid-xml"},"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W7215482356","https://openalex.org/W7023869462","https://openalex.org/W7162032452","https://openalex.org/W7201947396","https://openalex.org/W6947587068","https://openalex.org/W4416199163","https://openalex.org/W7162425130","https://openalex.org/W7172414193","https://openalex.org/W7204258325","https://openalex.org/W2886961401"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-10-28T10:33:24.094632","created_date":"2026-08-27T00:00:00"}
