{"id":"https://openalex.org/W7130596015","doi":"https://doi.org/10.1109/apccas67402.2025.11378018","title":"K-Band 65-nm CMOS 2-Stage LNA Using High-Pass Filter for Low-Noise and Neutralization Capacitor for Wideband Performance","display_name":"K-Band 65-nm CMOS 2-Stage LNA Using High-Pass Filter for Low-Noise and Neutralization Capacitor for Wideband Performance","publication_year":2025,"publication_date":"2025-10-12","ids":{"openalex":"https://openalex.org/W7130596015","doi":"https://doi.org/10.1109/apccas67402.2025.11378018"},"language":"en","primary_location":{"id":"doi:10.1109/apccas67402.2025.11378018","doi":"https://doi.org/10.1109/apccas67402.2025.11378018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas67402.2025.11378018","pdf_url":null,"source":{"id":"https://openalex.org/S7407087888","display_name":"IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111725593","display_name":"Chaeyun Kim","orcid":"https://orcid.org/0009-0002-7033-0382","observed_orcids":["https://orcid.org/0009-0002-7033-0382"]},"institutions":[{"id":"https://openalex.org/I141371507","display_name":"Soongsil University","ror":"https://ror.org/017xnm587","country_code":"KR","type":"education","lineage":["https://openalex.org/I141371507"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chaeyun Kim","raw_affiliation_strings":["Soongsil University,Department of Intelligent Semiconductors,Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Soongsil University,Department of Intelligent Semiconductors,Republic of Korea","institution_ids":["https://openalex.org/I141371507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065283560","display_name":"Hyojin Yoon","orcid":"https://orcid.org/0009-0007-0708-4189","observed_orcids":["https://orcid.org/0009-0007-0708-4189","https://orcid.org/0000-0002-1368-0485"]},"institutions":[{"id":"https://openalex.org/I141371507","display_name":"Soongsil University","ror":"https://ror.org/017xnm587","country_code":"KR","type":"education","lineage":["https://openalex.org/I141371507"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyojin Yoon","raw_affiliation_strings":["Soongsil University,Department of Intelligent Semiconductors,Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Soongsil University,Department of Intelligent Semiconductors,Republic of Korea","institution_ids":["https://openalex.org/I141371507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035397090","display_name":"Jaeyong Lee","orcid":"https://orcid.org/0000-0002-0073-2733","observed_orcids":["https://orcid.org/0000-0002-0073-2733"]},"institutions":[{"id":"https://openalex.org/I141371507","display_name":"Soongsil University","ror":"https://ror.org/017xnm587","country_code":"KR","type":"education","lineage":["https://openalex.org/I141371507"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaeyong Lee","raw_affiliation_strings":["Soongsil University,Department of Electronic Engineering,Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Soongsil University,Department of Electronic Engineering,Republic of Korea","institution_ids":["https://openalex.org/I141371507"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103037998","display_name":"Changkun Park","orcid":"https://orcid.org/0000-0002-4699-9935","observed_orcids":["https://orcid.org/0000-0002-4699-9935"]},"institutions":[{"id":"https://openalex.org/I141371507","display_name":"Soongsil University","ror":"https://ror.org/017xnm587","country_code":"KR","type":"education","lineage":["https://openalex.org/I141371507"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Changkun Park","raw_affiliation_strings":["Soongsil University,Department of Intelligent Semiconductors,Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Soongsil University,Department of Intelligent Semiconductors,Republic of Korea","institution_ids":["https://openalex.org/I141371507"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I141371507"],"apc_list":null,"apc_paid":null,"fwci":3.4123,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.88698277,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11248","display_name":"Advanced Power Amplifier Design","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-noise-amplifier","display_name":"low noise amplifier","score":0.9850000143051147},{"id":"https://openalex.org/keywords/k-band","display_name":"K-band","score":0.9769999980926514},{"id":"https://openalex.org/keywords/65-nm-cmos","display_name":"65 nm CMOS","score":0.902999997138977},{"id":"https://openalex.org/keywords/two-stage-amplifier","display_name":"two-stage amplifier","score":0.7210000157356262},{"id":"https://openalex.org/keywords/common-source-amplifier","display_name":"common-source amplifier","score":0.6610000133514404},{"id":"https://openalex.org/keywords/wideband-performance","display_name":"wideband performance","score":0.7350000143051147},{"id":"https://openalex.org/keywords/noise-figure","display_name":"noise figure","score":0.9449999928474426},{"id":"https://openalex.org/keywords/gain-flatness","display_name":"gain flatness","score":0.8579999804496765},{"id":"https://openalex.org/keywords/satellite-communication","display_name":"satellite communication","score":0.5600000023841858},{"id":"https://openalex.org/keywords/amplifier-stability","display_name":"amplifier stability","score":0.4729999899864197}],"concepts":[{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.7404000163078308},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5982999801635742},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5877000093460083},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5440000295639038},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5123000144958496},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5099999904632568},{"id":"https://openalex.org/C155332784","wikidata":"https://www.wikidata.org/wiki/Q1151304","display_name":"Low-noise amplifier","level":4,"score":0.4429999887943268},{"id":"https://openalex.org/C112806910","wikidata":"https://www.wikidata.org/wiki/Q746825","display_name":"Noise figure","level":4,"score":0.4426000118255615},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.43290001153945923},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.41370001435279846},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.375900000333786},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.37459999322891235},{"id":"https://openalex.org/C114489654","wikidata":"https://www.wikidata.org/wiki/Q805838","display_name":"Balun","level":3,"score":0.3589000105857849},{"id":"https://openalex.org/C66322947","wikidata":"https://www.wikidata.org/wiki/Q11658","display_name":"Transformer","level":3,"score":0.33640000224113464},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.32659998536109924},{"id":"https://openalex.org/C147788027","wikidata":"https://www.wikidata.org/wiki/Q2718101","display_name":"Band-pass filter","level":2,"score":0.30399999022483826},{"id":"https://openalex.org/C156137958","wikidata":"https://www.wikidata.org/wiki/Q262754","display_name":"High-pass filter","level":4,"score":0.30379998683929443},{"id":"https://openalex.org/C85899133","wikidata":"https://www.wikidata.org/wiki/Q557211","display_name":"Active filter","level":3,"score":0.2897000014781952},{"id":"https://openalex.org/C612350","wikidata":"https://www.wikidata.org/wiki/Q1761108","display_name":"Impedance matching","level":3,"score":0.28349998593330383},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.2662999927997589},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.2653000056743622},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.26350000500679016},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.2596000134944916}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas67402.2025.11378018","doi":"https://doi.org/10.1109/apccas67402.2025.11378018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas67402.2025.11378018","pdf_url":null,"source":{"id":"https://openalex.org/S7407087888","display_name":"IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2018955124","https://openalex.org/W3034005826","https://openalex.org/W3177051266","https://openalex.org/W3190301334","https://openalex.org/W4285283760","https://openalex.org/W4313477284","https://openalex.org/W4409098513"],"related_works":["https://openalex.org/W4407786777","https://openalex.org/W4206332600","https://openalex.org/W1988943390","https://openalex.org/W7117887596","https://openalex.org/W2244343629","https://openalex.org/W4410492387","https://openalex.org/W4367147704","https://openalex.org/W4312142642","https://openalex.org/W2149583609","https://openalex.org/W4405938032"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,22,35,67,75,82,94],"wideband":[4,51],"low-noise":[5],"amplifier":[6],"(LNA)":[7],"for":[8],"K-band":[9],"satellite":[10],"communications.":[11],"The":[12,30,53,63,87],"designed":[13],"LNA":[14,65],"is":[15],"implemented":[16],"in":[17],"a$65-\\text{nm}$CMOS":[18],"process":[19],"and":[20,60,74],"adopts":[21],"two-stage":[23],"single-ended":[24],"to":[25,39],"differential":[26,54],"common-source":[27],"(CS)":[28],"structure.":[29],"input":[31],"matching":[32],"network":[33],"employs":[34],"highpass":[36],"filter":[37],"(HPF)":[38],"minimize":[40],"noise,":[41],"while":[42],"the":[43,47],"interstage":[44],"transformer":[45],"lowers":[46],"Q-factor,":[48],"thereby":[49],"enabling":[50],"performance.":[52],"neutralization":[55],"capacitor":[56],"enhances":[57],"both":[58],"stability":[59],"gain":[61],"flatness.":[62],"proposed":[64],"achieves":[66],"minimum":[68],"noise":[69],"figure":[70],"of":[71,78],"1.95":[72],"dB":[73],"3-dB":[76],"bandwidth":[77],"13.3":[79],"GHz":[80],"over":[81],"frequency":[83],"range":[84],"of$17.0-21.5":[85],"\\text{GHz}$.":[86],"overall":[88],"chip":[89],"area":[90],"is$0.323":[91],"\\text{mm}^{2}$,":[92],"with":[93],"core":[95],"size":[96],"of$0.106":[97],"\\text{mm}^{2}$.":[98]},"counts_by_year":[{"year":2026,"cited_by_count":2}],"updated_date":"2026-11-10T11:39:43.021295","created_date":"2026-02-20T00:00:00"}