{"id":"https://openalex.org/W7127908052","doi":"https://doi.org/10.1051/itmconf/20268201016/pdf","title":"High-Speed AXI4-Lite Dynamic MAC Accelerator for RISC-V SoC Designs","display_name":"High-Speed AXI4-Lite Dynamic MAC Accelerator for RISC-V SoC Designs","publication_year":2026,"publication_date":"2026-02-04","ids":{"openalex":"https://openalex.org/W7127908052","doi":"https://doi.org/10.1051/itmconf/20268201016/pdf"},"language":"en","primary_location":{"id":"pmh:oai:edpsciences.org:dkey/10.1051/itmconf/20268201016","doi":"https://doi.org/10.1051/itmconf/20268201016/pdf","is_oa":true,"landing_page_url":"https://www.itm-conferences.org/10.1051/itmconf/20268201016/pdf","pdf_url":"https://www.itm-conferences.org/10.1051/itmconf/20268201016/pdf","source":{"id":"https://openalex.org/S4306400744","display_name":"Springer Link (Chiba Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I8488066","host_organization_name":"Chiba Institute of Technology","host_organization_lineage":["https://openalex.org/I8488066"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://doi.org/10.1051/itmconf/20268201016","raw_type":"Text"},"volume":null,"type":"article","indexed_in":[],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://www.itm-conferences.org/10.1051/itmconf/20268201016/pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5125062384","display_name":"Thirunaavukarasan S","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Thirunaavukarasan S","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125016011","display_name":"Sriram N","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sriram N","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5124944812","display_name":"Rohini G","orcid":"https://orcid.org/0000-0001-7531-9129","observed_orcids":["https://orcid.org/0000-0001-7531-9129"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rohini G","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06426485,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6815999746322632,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6815999746322632,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.26249998807907104,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.021800000220537186,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mac-unit","display_name":"MAC unit","score":0.5889999866485596},{"id":"https://openalex.org/keywords/brent-kung-adder","display_name":"Brent-Kung adder","score":0.9739999771118164},{"id":"https://openalex.org/keywords/two-stage-pipeline","display_name":"two-stage pipeline","score":0.7409999966621399},{"id":"https://openalex.org/keywords/fpga-implementation","display_name":"FPGA implementation","score":0.7369999885559082},{"id":"https://openalex.org/keywords/edge-processing","display_name":"edge processing","score":0.5559999942779541},{"id":"https://openalex.org/keywords/embedded-computing","display_name":"embedded computing","score":0.7059999704360962},{"id":"https://openalex.org/keywords/energy-efficiency","display_name":"energy efficiency","score":0.5090000033378601}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7111999988555908},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6607999801635742},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.6108999848365784},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5932000279426575},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5188999772071838},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.517300009727478},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4659000039100647},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4034000039100647},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.3910999894142151},{"id":"https://openalex.org/C19221803","wikidata":"https://www.wikidata.org/wiki/Q4668679","display_name":"Hydraulic accumulator","level":2,"score":0.3693000078201294},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.3601999878883362},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.34850001335144043},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.34459999203681946},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.32749998569488525},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3257000148296356},{"id":"https://openalex.org/C2778000800","wikidata":"https://www.wikidata.org/wiki/Q830043","display_name":"Handshake","level":3,"score":0.31610000133514404},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.3098999857902527},{"id":"https://openalex.org/C127879752","wikidata":"https://www.wikidata.org/wiki/Q3390760","display_name":"Place and route","level":3,"score":0.30230000615119934},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.2922999858856201},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.29170000553131104},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.28949999809265137},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.2874000072479248},{"id":"https://openalex.org/C81988521","wikidata":"https://www.wikidata.org/wiki/Q676838","display_name":"Control unit","level":2,"score":0.2858000099658966},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.2858000099658966},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.2851000130176544},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.2815999984741211},{"id":"https://openalex.org/C2078106","wikidata":"https://www.wikidata.org/wiki/Q14906620","display_name":"Accumulator (cryptography)","level":2,"score":0.2793999910354614},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.2711000144481659},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.2639000117778778},{"id":"https://openalex.org/C2776690351","wikidata":"https://www.wikidata.org/wiki/Q1141640","display_name":"Fieldbus","level":3,"score":0.2524000108242035},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.25099998712539673}],"mesh":[],"locations_count":1,"locations":[{"id":"pmh:oai:edpsciences.org:dkey/10.1051/itmconf/20268201016","doi":"https://doi.org/10.1051/itmconf/20268201016/pdf","is_oa":true,"landing_page_url":"https://www.itm-conferences.org/10.1051/itmconf/20268201016/pdf","pdf_url":"https://www.itm-conferences.org/10.1051/itmconf/20268201016/pdf","source":{"id":"https://openalex.org/S4306400744","display_name":"Springer Link (Chiba Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I8488066","host_organization_name":"Chiba Institute of Technology","host_organization_lineage":["https://openalex.org/I8488066"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://doi.org/10.1051/itmconf/20268201016","raw_type":"Text"}],"best_oa_location":{"id":"pmh:oai:edpsciences.org:dkey/10.1051/itmconf/20268201016","doi":"https://doi.org/10.1051/itmconf/20268201016/pdf","is_oa":true,"landing_page_url":"https://www.itm-conferences.org/10.1051/itmconf/20268201016/pdf","pdf_url":"https://www.itm-conferences.org/10.1051/itmconf/20268201016/pdf","source":{"id":"https://openalex.org/S4306400744","display_name":"Springer Link (Chiba Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I8488066","host_organization_name":"Chiba Institute of Technology","host_organization_lineage":["https://openalex.org/I8488066"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://doi.org/10.1051/itmconf/20268201016","raw_type":"Text"},"sustainable_development_goals":[],"sustainable_development_goals_aurora":[{"display_name":"Affordable and clean energy","score":0.6313109397888184,"id":"https://metadata.un.org/sdg/7"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W7127908052.pdf","grobid_xml":"https://content.openalex.org/works/W7127908052.grobid-xml"},"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0],"design":[1,29],"and":[2,13,35,45,73,83,104,110,116,125,158,166],"realization":[3],"of":[4,87,106,141],"a":[5,25,78],"high-speed":[6],"dynamic-precision":[7,66],"Multiply\u2013Accumulate":[8],"(DPMAC)":[9],"accelerator":[10],"targets":[11],"embedded":[12,164],"RISC-V-based":[14],"System-on-Chip":[15],"(SoC)":[16],"platforms.":[17],"Unlike":[18],"conventional":[19],"MAC":[20,137],"units":[21],"that":[22],"operate":[23],"with":[24,95],"fixed":[26],"precision,":[27,107],"this":[28],"supports":[30],"runtime":[31],"configurable":[32],"8-,":[33],"16-,":[34],"32-bit":[36],"precision":[37,88],"modes.":[38,64],"These":[39],"modes":[40],"allow":[41],"accuracy,":[42],"energy":[43],"efficiency,":[44],"operational":[46],"behaviour":[47],"to":[48,52,134],"be":[49],"tuned":[50],"according":[51],"workload":[53],"requirements,":[54],"while":[55,128],"the":[56,59,118,152],"pipeline":[57],"maintains":[58],"same":[60],"latency":[61],"for":[62,162],"all":[63],"The":[65,90,139],"MAC\u2019s":[67],"data-path":[68],"integrates":[69],"Radix-4":[70],"Booth":[71],"multiplier":[72],"Brent\u2013":[74],"Kung":[75],"adder":[76],"within":[77],"two-stage":[79],"pipeline,":[80],"ensuring":[81],"deterministic":[82],"low-latency":[84],"operation":[85],"regardless":[86],"selection.":[89],"AXI4-Lite":[91],"interface":[92],"enables":[93],"communication":[94],"processor":[96],"subsystems":[97],"through":[98],"memory-mapped":[99],"registers,":[100],"providing":[101],"flexible":[102],"configuration":[103],"control":[105],"start/enable":[108],"logic,":[109],"accumulator":[111],"behaviour.":[112],"Through":[113],"FPGA":[114],"synthesis":[115],"testing,":[117],"proposed":[119],"AXI-MAC":[120],"unit":[121],"demonstrates":[122],"competitive":[123],"timing":[124],"resource":[126],"utilization":[127],"offering":[129],"improved":[130],"numerical":[131],"flexibility":[132],"compared":[133],"traditional":[135],"fixed-precision":[136],"units.":[138],"absence":[140],"DSP":[142],"slice":[143],"requirements":[144],"further":[145],"enhances":[146],"portability":[147],"across":[148],"devices.":[149],"As":[150],"such,":[151],"architecture":[153],"provides":[154],"an":[155],"efficient,":[156],"high-performance,":[157],"scalable":[159],"solution":[160],"suitable":[161],"next-generation":[163],"computing":[165],"edge-processing":[167],"applications.":[168]},"counts_by_year":[],"updated_date":"2026-10-12T09:40:04.860316","created_date":"2026-02-07T00:00:00"}
