{"id":"https://openalex.org/W7117136409","doi":"https://doi.org/10.1109/jssc.2025.3645284","title":"An Energy Efficient Amplifier With a Closed-Loop G m -Boosting Stage and Current-Mirror-Based SR Enhancement for Driving Large Capacitive Loads","display_name":"An Energy Efficient Amplifier With a Closed-Loop G m -Boosting Stage and Current-Mirror-Based SR Enhancement for Driving Large Capacitive Loads","publication_year":2025,"publication_date":"2025-12-24","ids":{"openalex":"https://openalex.org/W7117136409","doi":"https://doi.org/10.1109/jssc.2025.3645284"},"language":null,"primary_location":{"id":"doi:10.1109/jssc.2025.3645284","doi":"https://doi.org/10.1109/jssc.2025.3645284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3645284","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-3","norway-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"volume":null,"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Siyao Cao","orcid":"https://orcid.org/0009-0003-1678-1307","observed_orcids":["https://orcid.org/0009-0003-1678-1307"]},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Siyao Cao","raw_affiliation_strings":["Institution of VLSI, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0009-0003-1678-1307","affiliations":[{"raw_affiliation_string":"Institution of VLSI, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100722833","display_name":"Mengyu Li","orcid":"https://orcid.org/0000-0002-5015-0328","observed_orcids":["https://orcid.org/0000-0002-5015-0328"]},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mengyu Li","raw_affiliation_strings":["Institution of VLSI, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-5015-0328","affiliations":[{"raw_affiliation_string":"Institution of VLSI, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045269228","display_name":"Dehong Wang","orcid":"https://orcid.org/0009-0006-3536-1019","observed_orcids":["https://orcid.org/0009-0006-3536-1019"]},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dehong Wang","raw_affiliation_strings":["Institution of VLSI, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0009-0006-3536-1019","affiliations":[{"raw_affiliation_string":"Institution of VLSI, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042926263","display_name":"Qiuyang Lin","orcid":"https://orcid.org/0000-0002-7422-5793","observed_orcids":["https://orcid.org/0000-0002-7422-5793"]},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Qiuyang Lin","raw_affiliation_strings":["IMEC, Heverlee, Belgium"],"raw_orcid":"https://orcid.org/0000-0002-7422-5793","affiliations":[{"raw_affiliation_string":"IMEC, Heverlee, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032185713","display_name":"Kai Huang","orcid":"https://orcid.org/0000-0002-5034-7171","observed_orcids":["https://orcid.org/0000-0002-5034-7171"]},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kai Huang","raw_affiliation_strings":["Institution of VLSI, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-5034-7171","affiliations":[{"raw_affiliation_string":"Institution of VLSI, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074328280","display_name":"Zhichao Tan","orcid":"https://orcid.org/0000-0002-4097-5123","observed_orcids":["https://orcid.org/0000-0002-4097-5123"]},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhichao Tan","raw_affiliation_strings":["Institution of VLSI, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-4097-5123","affiliations":[{"raw_affiliation_string":"Institution of VLSI, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066353712","display_name":"Menglian Zhao","orcid":"https://orcid.org/0000-0002-2500-2892","observed_orcids":["https://orcid.org/0000-0002-2500-2892"]},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Menglian Zhao","raw_affiliation_strings":["Institution of VLSI, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-2500-2892","affiliations":[{"raw_affiliation_string":"Institution of VLSI, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028089041","display_name":"Shuang Song","orcid":"https://orcid.org/0000-0002-8550-6320","observed_orcids":["https://orcid.org/0000-0002-8550-6320"]},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuang Song","raw_affiliation_strings":["Institution of VLSI, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-8550-6320","affiliations":[{"raw_affiliation_string":"Institution of VLSI, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.30361872,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"61","issue":"7","first_page":"3623","last_page":"3635"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9648000001907349,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9648000001907349,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.021199999377131462,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.011699999682605267,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/two-stage-amplifier","display_name":"two-stage amplifier","score":0.7379999756813049},{"id":"https://openalex.org/keywords/dominant-poles","display_name":"dominant poles","score":0.7080000042915344},{"id":"https://openalex.org/keywords/gain-bandwidth-product","display_name":"gain-bandwidth product","score":0.7459999918937683},{"id":"https://openalex.org/keywords/current-driving-capability","display_name":"current driving capability","score":0.5350000262260437},{"id":"https://openalex.org/keywords/cross-coupled-pair","display_name":"cross-coupled pair","score":0.8939999938011169},{"id":"https://openalex.org/keywords/pvt-variation-robustness","display_name":"PVT robustness","score":0.9480000138282776},{"id":"https://openalex.org/keywords/low-power-amplifier","display_name":"low-power amplifier","score":0.6869999766349792},{"id":"https://openalex.org/keywords/55-nm-cmos","display_name":"55 nm CMOS","score":0.9210000038146973}],"concepts":[{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6746000051498413},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5726000070571899},{"id":"https://openalex.org/C172218469","wikidata":"https://www.wikidata.org/wiki/Q4477697","display_name":"Direct-coupled amplifier","level":5,"score":0.5152000188827515},{"id":"https://openalex.org/C206755178","wikidata":"https://www.wikidata.org/wiki/Q1131271","display_name":"Capacitive sensing","level":2,"score":0.5059000253677368},{"id":"https://openalex.org/C68742264","wikidata":"https://www.wikidata.org/wiki/Q1736442","display_name":"Current-feedback operational amplifier","level":5,"score":0.49950000643730164},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.4812999963760376},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.461899995803833},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.45910000801086426},{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.4456000030040741},{"id":"https://openalex.org/C82517063","wikidata":"https://www.wikidata.org/wiki/Q1591315","display_name":"Slew rate","level":3,"score":0.4440000057220459},{"id":"https://openalex.org/C89123640","wikidata":"https://www.wikidata.org/wiki/Q1523756","display_name":"Instrumentation amplifier","level":5,"score":0.4113999903202057},{"id":"https://openalex.org/C189184530","wikidata":"https://www.wikidata.org/wiki/Q5508342","display_name":"Fully differential amplifier","level":5,"score":0.41019999980926514},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.39809998869895935},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3962000012397766},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.35249999165534973},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3467999994754791},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.33469998836517334},{"id":"https://openalex.org/C71041172","wikidata":"https://www.wikidata.org/wiki/Q6553412","display_name":"Linear amplifier","level":5,"score":0.33169999718666077},{"id":"https://openalex.org/C129231560","wikidata":"https://www.wikidata.org/wiki/Q7236462","display_name":"Power-added efficiency","level":5,"score":0.3255000114440918},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.31779998540878296},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.3070000112056732},{"id":"https://openalex.org/C182442803","wikidata":"https://www.wikidata.org/wiki/Q5195113","display_name":"Current sense amplifier","level":5,"score":0.2957000136375427},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.2948000133037567},{"id":"https://openalex.org/C64424096","wikidata":"https://www.wikidata.org/wiki/Q750454","display_name":"Power factor","level":3,"score":0.27810001373291016},{"id":"https://openalex.org/C131782439","wikidata":"https://www.wikidata.org/wiki/Q1455581","display_name":"Frequency compensation","level":4,"score":0.26969999074935913},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.26579999923706055},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.25699999928474426},{"id":"https://openalex.org/C154318817","wikidata":"https://www.wikidata.org/wiki/Q2157249","display_name":"Parasitic capacitance","level":4,"score":0.2542000114917755},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.2540000081062317}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/jssc.2025.3645284","doi":"https://doi.org/10.1109/jssc.2025.3645284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2025.3645284","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-3","norway-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5378999710083008,"display_name":"Industry, innovation and infrastructure"}],"sustainable_development_goals_aurora":[{"id":"https://metadata.un.org/sdg/7","score":0.916037917137146,"display_name":"Affordable and clean energy"}],"study_designs":[],"awards":[{"id":"https://openalex.org/G8543211720","display_name":null,"funder_award_id":"2024C01009","funder_id":"https://openalex.org/F4320338470","funder_display_name":"Science Research Foundation of Zhejiang Province"},{"id":"https://openalex.org/G8921800214","display_name":null,"funder_award_id":"U22A2013","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320338470","display_name":"Science Research Foundation of Zhejiang Province","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1673818769","https://openalex.org/W2004391179","https://openalex.org/W2011100675","https://openalex.org/W2035013341","https://openalex.org/W2037768116","https://openalex.org/W2081968211","https://openalex.org/W2110171809","https://openalex.org/W2113721374","https://openalex.org/W2129167251","https://openalex.org/W2138099536","https://openalex.org/W2152333361","https://openalex.org/W2163227093","https://openalex.org/W2182422795","https://openalex.org/W2513579149","https://openalex.org/W2551453206","https://openalex.org/W2559152050","https://openalex.org/W2734608556","https://openalex.org/W2737095059","https://openalex.org/W2800084325","https://openalex.org/W2809126302","https://openalex.org/W2885358920","https://openalex.org/W2911273972","https://openalex.org/W2949920751","https://openalex.org/W3011936957","https://openalex.org/W3040816219","https://openalex.org/W3097724638","https://openalex.org/W3119811928","https://openalex.org/W3197367315","https://openalex.org/W3199072567","https://openalex.org/W3216750733","https://openalex.org/W4296338435","https://openalex.org/W4388267234","https://openalex.org/W4403676287"],"related_works":[],"abstract_inverted_index":{"This":[0,71],"article":[1],"proposes":[2],"a":[3,47,51,56,77,86,106,120,126,152,175],"low-power":[4],"two-stage":[5],"amplifier":[6,40,102,184],"for":[7,186],"large":[8,187],"capacitive":[9],"load":[10],"driving.":[11],"A":[12],"closed-loop$g_{\\text{m}}$-boosting":[13],"(CLGB)":[14],"stage":[15],"with":[16,34,46,85,97,111,125,151,155,174],"complementary":[17],"driving":[18,69,189],"devices":[19],"is":[20,63,103],"exploited":[21],"to":[22,65,80,89],"reduce":[23],"the":[24,30,39,42,67,74,137,140,162,165],"output":[25,31],"resistance,":[26],"and":[27,172],"thus,":[28],"makes":[29],"pole":[32,44],"non-dominant":[33],"minimum":[35],"power":[36],"overhead.":[37],"Therefore,":[38],"has":[41],"dominant":[43],"internally":[45],"small":[48],"capacitor,":[49],"achieving":[50,129],"high":[52,93],"gain-bandwidth":[53],"(GBW).":[54],"Meanwhile,":[55],"current-mirror-based":[57],"slew":[58],"rate":[59],"(SR)":[60],"enhancement":[61],"circuit":[62,72],"implemented":[64,104],"increase":[66],"current":[68,84,177],"capability.":[70],"leverages":[73],"gain":[75],"of":[76,115,122,139,148,164,178],"cross-coupled":[78],"pair":[79],"generate":[81],"an":[82,112,130,146,156],"SR-enhancing":[83],"fixed":[87],"ratio":[88],"its":[90],"bias,":[91],"featuring":[92],"PVT":[94],"robustness":[95],"compared":[96],"voltage-based":[98],"enhancement.":[99],"The":[100,169],"proposed":[101],"in":[105],"standard":[107],"55-nm":[108],"CMOS":[109],"technology,":[110],"active":[113],"area":[114],"0.009":[116],"mm2.":[117],"It":[118,144],"achieves":[119],"GBW":[121,171],"1.6":[123],"MHz":[124],"12-nF$C_{\\mathrm":[127],"{L}}$,":[128],"IFoMSof":[131],"9":[132],"84":[133],"615":[134],"that":[135],"advances":[136],"state":[138,163],"art":[141,166],"by$1.4\\times":[142],"$.":[143,168],"provides":[145],"SR":[147,173],"0.19V/$\\mu":[149],"$s":[150],"12-nF":[153],"load,":[154],"IFoMLof":[157],"1":[158],"16":[159],"923,":[160],"exceeding":[161],"by$2\\times":[167],"excellent":[170],"quiescent":[176],"only":[179],"19.5$\\mu":[180],"$A":[181],"make":[182],"this":[183],"suitable":[185],"capacitance":[188],"applications.":[190]},"counts_by_year":[],"updated_date":"2026-09-27T08:07:27.782135","created_date":"2025-12-24T00:00:00"}