{"id":"https://openalex.org/W7097743738","doi":null,"title":"Diffusion Programmable Device : The device to prevent reverse engineering.","display_name":"Diffusion Programmable Device : The device to prevent reverse engineering.","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W7097743738","mag":"2776226745"},"language":"en","primary_location":{"id":"pmh:oai:CiteSeerX.psu:10.1.1.643.6075","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.643.6075","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://eprint.iacr.org/2014/109.pdf","raw_type":"text"},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049245325","display_name":"Mitsuru Shiozaki","orcid":"https://orcid.org/0000-0003-3217-5262","observed_orcids":["https://orcid.org/0000-0003-3217-5262"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Mitsuru Shiozaki","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0003-3217-5262","affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022574287","display_name":"Hori Ryohei","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hori Ryohei","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":null,"display_name":"Takeshi Fujino","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Takeshi Fujino","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.0525,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.96416109,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":99},"biblio":{"volume":"2014","issue":null,"first_page":"109","last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":true,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrated-circuit-security","display_name":"integrated circuit security","score":0.7570000290870667},{"id":"https://openalex.org/keywords/lookup-tables","display_name":"look-up table","score":0.8740000128746033},{"id":"https://openalex.org/keywords/diffusion-layer","display_name":"diffusion layer","score":0.656000018119812},{"id":"https://openalex.org/keywords/smart-card-security","display_name":"smart card security","score":0.640999972820282},{"id":"https://openalex.org/keywords/counterfeiting-prevention","display_name":"counterfeit prevention","score":0.5199999809265137},{"id":"https://openalex.org/keywords/0-18-mum-cmos","display_name":"0.18 \u03bcm CMOS","score":0.843999981880188}],"concepts":[{"id":"https://openalex.org/C2779356469","wikidata":"https://www.wikidata.org/wiki/Q502918","display_name":"Counterfeit","level":2,"score":0.699400007724762},{"id":"https://openalex.org/C57684291","wikidata":"https://www.wikidata.org/wiki/Q1336142","display_name":"XNOR gate","level":4,"score":0.6929000020027161},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5365999937057495},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5131999850273132},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4884999990463257},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.47600001096725464},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.4422000050544739},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.42660000920295715},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.40459999442100525},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.40209999680519104},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3950999975204468},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.3896999955177307},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38749998807907104},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3650999963283539},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.3630000054836273},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3610000014305115},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.35670000314712524},{"id":"https://openalex.org/C207850805","wikidata":"https://www.wikidata.org/wiki/Q269608","display_name":"Reverse engineering","level":2,"score":0.34950000047683716},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.3181999921798706},{"id":"https://openalex.org/C39217717","wikidata":"https://www.wikidata.org/wiki/Q1432354","display_name":"Hardware security module","level":3,"score":0.31709998846054077},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.2973000109195709},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.2973000109195709},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2921000123023987},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.28929999470710754},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2822999954223633},{"id":"https://openalex.org/C21593369","wikidata":"https://www.wikidata.org/wiki/Q1032176","display_name":"Countermeasure","level":2,"score":0.2685000002384186},{"id":"https://openalex.org/C56949724","wikidata":"https://www.wikidata.org/wiki/Q219079","display_name":"Truth table","level":2,"score":0.26579999923706055},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.25769999623298645},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.25519999861717224}],"mesh":[],"locations_count":2,"locations":[{"id":"pmh:oai:CiteSeerX.psu:10.1.1.643.6075","doi":null,"is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.643.6075","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://eprint.iacr.org/2014/109.pdf","raw_type":"text"},{"id":"mag:2776226745","doi":null,"is_oa":false,"landing_page_url":"https://eprint.iacr.org/2014/109.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S2764847869","display_name":"IACR Cryptology ePrint Archive","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":["https://openalex.org/P4322614454"],"host_organization_lineage_names":["Cryptology ePrint Archive"],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IACR Cryptology ePrint Archive","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1548321487","https://openalex.org/W1818180773","https://openalex.org/W2029979276","https://openalex.org/W2115394282","https://openalex.org/W2140904634"],"related_works":["https://openalex.org/W2776226745","https://openalex.org/W2109396078","https://openalex.org/W2913761201","https://openalex.org/W2574876421","https://openalex.org/W2614239714","https://openalex.org/W2165205209","https://openalex.org/W1965070878","https://openalex.org/W1987134536","https://openalex.org/W2099724084","https://openalex.org/W2241201313"],"abstract_inverted_index":{"The":[0,25],"secret":[1],"information,":[2],"which":[3],"is":[4],"embedded":[5],"in":[6],"integrated":[7],"circuit":[8,26,50,75],"(IC)":[9],"devices":[10],"such":[11,131],"as":[12,66,132],"a":[13,67,107,121],"smart":[14],"card,":[15],"has":[16],"the":[17,34,37,44,49,54,60,70,78,87,93,101,116],"risk":[18],"of":[19,28,109,127],"theft":[20],"by":[21,33,99],"reverse":[22],"engineering":[23],"(RE).":[24],"design":[27],"IC":[29,46],"can":[30,39,80,96],"be":[31,40,97],"stolen":[32],"RE,":[35],"and":[36,136],"counterfeit":[38],"illegally":[41],"fabricated.":[42],"Therefore,":[43],"secure":[45],"device":[47,63],"requires":[48],"architecture":[51,65],"protected":[52],"from":[53],"RE":[55],"attacks.":[56],"This":[57],"paper":[58],"proposes":[59],"diffusion":[61,90],"programmable":[62],"(DPD)":[64],"countermeasure":[68],"against":[69],"RE.":[71],"A":[72,112],"look-up":[73],"table":[74],"based":[76],"on":[77],"DPD":[79],"generate":[81],"desired":[82],"logic":[83,94,129],"function":[84,95],"without":[85],"changing":[86],"layout":[88],"except":[89],"layer.":[91],"And,":[92,125],"programmed":[98],"assigning":[100],"N-type":[102],"or":[103],"P-type":[104],"dopant":[105],"to":[106],"part":[108],"active":[110],"region.":[111],"test":[113],"chip":[114],"using":[115],"DPD-LUT":[117],"was":[118],"prototyped":[119],"with":[120],"180nm":[122],"CMOS":[123],"technology.":[124],"operations":[126],"vaious":[128],"functions":[130],"AND,":[133],"OR,":[134],"XOR":[135],"XNOR":[137],"were":[138],"confirmed":[139],"through":[140],"experiments.":[141]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":7},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-11-08T12:12:28.789561","created_date":"2025-10-27T00:00:00"}