{"id":"https://openalex.org/W563401709","doi":null,"title":"Multiprocessor Computer Architectures","display_name":"Multiprocessor Computer Architectures","publication_year":1991,"publication_date":"1991-06-01","ids":{"openalex":"https://openalex.org/W563401709","mag":"563401709"},"language":"en","primary_location":{"id":"mag:563401709","doi":null,"is_oa":false,"landing_page_url":"http://ci.nii.ac.jp/ncid/BA10571715","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null},"volume":null,"type":"book","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111528109","display_name":"Terry J. Fountain","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Terry J. Fountain","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5111975433","display_name":"M.J. Shute","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M.J. Shute","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9739,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.76397516,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.0015999999595806003,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.0013000000035390258,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiprocessor-architecture","display_name":"multiprocessor architecture","score":0.8709999918937683},{"id":"https://openalex.org/keywords/parallel-architectures","display_name":"parallel computing architecture","score":0.8119999766349792},{"id":"https://openalex.org/keywords/parallel-graph-reduction","display_name":"parallel graph reduction","score":0.8399999737739563},{"id":"https://openalex.org/keywords/parallel-programming-languages","display_name":"parallel programming languages","score":0.3790000081062317}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6681646704673767},{"id":"https://openalex.org/C2778319340","wikidata":"https://www.wikidata.org/wiki/Q776861","display_name":"Transputer","level":2,"score":0.6618413329124451},{"id":"https://openalex.org/C2777667586","wikidata":"https://www.wikidata.org/wiki/Q8038170","display_name":"Wright","level":2,"score":0.5211484432220459},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5123904347419739},{"id":"https://openalex.org/C2778222013","wikidata":"https://www.wikidata.org/wiki/Q1136926","display_name":"Alice (programming language)","level":2,"score":0.5088887214660645},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.4783432185649872},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.462890088558197},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4587258994579315},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39605242013931274},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.34245622158050537},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2947927713394165},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.1687195599079132},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.07216018438339233}],"mesh":[],"locations_count":1,"locations":[{"id":"mag:563401709","doi":null,"is_oa":false,"landing_page_url":"http://ci.nii.ac.jp/ncid/BA10571715","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W658769422","https://openalex.org/W2481759493","https://openalex.org/W4231975990","https://openalex.org/W2985933620","https://openalex.org/W591183237","https://openalex.org/W93335274","https://openalex.org/W1577093684","https://openalex.org/W4242732001","https://openalex.org/W1878455722","https://openalex.org/W2324876502"],"abstract_inverted_index":{"1.":[0],"Categorising":[1],"Parallel":[2,20,44],"Computer":[3],"Architectures":[4,112],"(M.J.":[5,12],"Shute).":[6],"2.":[7],"The":[8,18,75,82,103],"Experimental":[9],"ALICE":[10],"Machine":[11,21],"Reeve":[13],"and":[14,34,54,71,91],"S.":[15],"Wright).":[16],"3.":[17],"FLAGSHIP":[19],"(P.":[22,63],"Watson).":[23],"4.":[24],"Experiments":[25],"with":[26],"the":[27],"ZAPP":[28],"Virtual":[29],"Tree":[30],"Architecture":[31,42],"(D.L.":[32],"McBurney":[33],"M.R.":[35],"Sleep).":[36],"5.":[37],"GRIP":[38],"-":[39],"A":[40,59,95],"High-Performance":[41],"for":[43],"Graph":[45],"Reduction":[46],"(S.L.":[47],"Peyton":[48],"Jones,":[49],"C.":[50,67],"Clack,":[51],"J.":[52,89],"Salkild":[53],"M.":[55],"Hardie).":[56],"6.":[57],"COBWEB-2":[58],"Declarative":[60],"Language":[61],"Multiprocessor":[62],"Anderson,":[64],"D.":[65],"Bolton,":[66],"Hankin,":[68],"P.":[69,72],"Kelly":[70],"Osmon).":[73],"7.":[74],"MANCHESTER":[76],"DATAFLOW":[77],"Project":[78],"(C.":[79],"Kirkham).":[80],"8.":[81],"AMT":[83],"DAP":[84],"500":[85],"System":[86],"(A.G.":[87],"Bale,":[88],"Litt":[90],"C.J.":[92],"Pavelin).":[93],"9.":[94],"Bit-Serial":[96],"Systolic":[97],"Back-Projection":[98],"Engine":[99],"(R.":[100],"Bayford).":[101],"10.":[102],"CLIP7":[104],"Programme":[105],"(T.J.":[106,117],"Fountain).":[107,118],"11.":[108],"Reconfigurable":[109],"Transputer":[110],"Processor":[111],"(D.A.":[113],"Nicole).":[114],"12.":[115],"Conclusions":[116],"Index.":[119]},"counts_by_year":[],"updated_date":"2026-11-03T10:50:19.383937","created_date":"2016-06-24T00:00:00"}