{"id":"https://openalex.org/W55745527","doi":"https://doi.org/10.1007/978-3-642-36424-2_6","title":"A Multi-core Memory Organization for 3-D DRAM as Main Memory","display_name":"A Multi-core Memory Organization for 3-D DRAM as Main Memory","publication_year":2013,"publication_date":"2013-01-01","ids":{"openalex":"https://openalex.org/W55745527","doi":"https://doi.org/10.1007/978-3-642-36424-2_6","mag":"55745527"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-36424-2_6","doi":"https://doi.org/10.1007/978-3-642-36424-2_6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-36424-2_6","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","ki-jl-1","norway-1","vabb-shw"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"volume":{"id":"https://openalex.org/W2568547875","display_name":"Architecture of Computing Systems \u2013 ARCS 2013"},"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033209949","display_name":"Jared Sherman","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I123534392","display_name":"University of North Texas","ror":"https://ror.org/00v97ad02","country_code":"US","type":"education","lineage":["https://openalex.org/I123534392"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jared Sherman","raw_affiliation_strings":["University of North Texas, Denton, Texas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of North Texas, Denton, Texas, USA","institution_ids":["https://openalex.org/I123534392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102732379","display_name":"Krishna M. Kavi","orcid":"https://orcid.org/0000-0003-1581-8166","observed_orcids":["https://orcid.org/0000-0003-1581-8166"]},"institutions":[{"id":"https://openalex.org/I123534392","display_name":"University of North Texas","ror":"https://ror.org/00v97ad02","country_code":"US","type":"education","lineage":["https://openalex.org/I123534392"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Krishna Kavi","raw_affiliation_strings":["University of North Texas, Denton, Texas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of North Texas, Denton, Texas, USA","institution_ids":["https://openalex.org/I123534392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066237592","display_name":"Brandon Potter","orcid":"https://orcid.org/0009-0001-0223-1641","observed_orcids":["https://orcid.org/0009-0001-0223-1641"]},"institutions":[{"id":"https://openalex.org/I123534392","display_name":"University of North Texas","ror":"https://ror.org/00v97ad02","country_code":"US","type":"education","lineage":["https://openalex.org/I123534392"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brandon Potter","raw_affiliation_strings":["University of North Texas, Denton, Texas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of North Texas, Denton, Texas, USA","institution_ids":["https://openalex.org/I123534392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006421293","display_name":"Mike Ignatowski","orcid":"https://orcid.org/0009-0009-7091-6982","observed_orcids":["https://orcid.org/0009-0009-7091-6982"]},"institutions":[{"id":"https://openalex.org/I4210137977","display_name":"Advanced Micro Devices (United States)","ror":"https://ror.org/04kd6c783","country_code":"US","type":"company","lineage":["https://openalex.org/I4210137977"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mike Ignatowski","raw_affiliation_strings":["Advanced Micro Devices, Austin, Texas, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Austin, Texas, USA","institution_ids":["https://openalex.org/I4210137977"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.3787,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.47089041,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"62","last_page":"73"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9345999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9345999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.029999999329447746,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.008799999952316284,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"non-volatile memory","score":0.7990000247955322},{"id":"https://openalex.org/keywords/phase-change-memory","display_name":"phase-change memory","score":0.9869999885559082},{"id":"https://openalex.org/keywords/address-translation","display_name":"address translation","score":0.7350000143051147},{"id":"https://openalex.org/keywords/memory-allocation","display_name":"memory allocation","score":0.6790000200271606},{"id":"https://openalex.org/keywords/page-size","display_name":"page size","score":0.8870000243186951},{"id":"https://openalex.org/keywords/write-buffer","display_name":"write buffer","score":0.8309999704360962},{"id":"https://openalex.org/keywords/multicore-systems","display_name":"multi-core systems","score":0.906000018119812},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"energy consumption","score":0.6639999747276306},{"id":"https://openalex.org/keywords/access-latency","display_name":"access latency","score":0.8899999856948853}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8605949282646179},{"id":"https://openalex.org/C116007543","wikidata":"https://www.wikidata.org/wiki/Q1071403","display_name":"Translation lookaside buffer","level":4,"score":0.7475812435150146},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6881850361824036},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6076112985610962},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5961642861366272},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.5262222290039062},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.5261294841766357},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.4472528100013733},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44450002908706665},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.43272578716278076},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.43209803104400635},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4210747182369232},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3840084969997406},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.37756016850471497},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.33375704288482666},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2984068989753723},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.2979191541671753}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-36424-2_6","doi":"https://doi.org/10.1007/978-3-642-36424-2_6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-36424-2_6","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","ki-jl-1","norway-1","vabb-shw"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W112400010","https://openalex.org/W196027037","https://openalex.org/W1982841379","https://openalex.org/W2048588974","https://openalex.org/W2049403384","https://openalex.org/W2097157718","https://openalex.org/W2097823832","https://openalex.org/W2102449048","https://openalex.org/W2112300321","https://openalex.org/W2120635877","https://openalex.org/W2131413854","https://openalex.org/W2135675903","https://openalex.org/W2142012233","https://openalex.org/W2143285027","https://openalex.org/W2148797773","https://openalex.org/W2295099251","https://openalex.org/W2998915116","https://openalex.org/W3139689176","https://openalex.org/W4237150160","https://openalex.org/W4241727715","https://openalex.org/W4245425914"],"related_works":["https://openalex.org/W2077105843","https://openalex.org/W196027037","https://openalex.org/W2159697788","https://openalex.org/W1210553197","https://openalex.org/W7097837881","https://openalex.org/W2079019992","https://openalex.org/W57671392","https://openalex.org/W6884877364","https://openalex.org/W3185867486","https://openalex.org/W176832019"],"abstract_inverted_index":null,"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2016-06-24T00:00:00"}
