{"id":"https://openalex.org/W4417403304","doi":"https://doi.org/10.1109/pact65351.2025.00050","title":"POSTER: PIMAP: Characterizing a Real Processing-in-Memory System for Analytical Data Processing","display_name":"POSTER: PIMAP: Characterizing a Real Processing-in-Memory System for Analytical Data Processing","publication_year":2025,"publication_date":"2025-11-03","ids":{"openalex":"https://openalex.org/W4417403304","doi":"https://doi.org/10.1109/pact65351.2025.00050"},"language":"en","primary_location":{"id":"doi:10.1109/pact65351.2025.00050","doi":"https://doi.org/10.1109/pact65351.2025.00050","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact65351.2025.00050","pdf_url":null,"source":{"id":"https://openalex.org/S4210194525","display_name":"International Conference on Parallel Architectures and Compilation Techniques (PACT)","issn_l":"1089-795X","issn":["1089-795X","2641-7944"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 34th International Conference on Parallel Architectures and Compilation Techniques (PACT)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5093670784","display_name":"Manos Frouzakis","orcid":"https://orcid.org/0009-0001-2536-7082","observed_orcids":["https://orcid.org/0009-0001-2536-7082"]},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Manos Frouzakis","raw_affiliation_strings":["ETH Zürich"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ETH Zürich","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044416322","display_name":"Juan G\u00f3mez-Luna","orcid":"https://orcid.org/0000-0002-6514-1571","observed_orcids":["https://orcid.org/0000-0002-6514-1571"]},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Juan G\u00f3mez-Luna","raw_affiliation_strings":["NVIDIA Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NVIDIA Research","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091016237","display_name":"Geraldo Francisco de Oliveira Junior","orcid":"https://orcid.org/0000-0003-1557-4819","observed_orcids":["https://orcid.org/0000-0003-1557-4819"]},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Geraldo F. Oliveira","raw_affiliation_strings":["ETH Zürich"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ETH Zürich","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008240365","display_name":"Mohammad Sadrosadati","orcid":"https://orcid.org/0000-0002-4029-0175","observed_orcids":["https://orcid.org/0000-0002-4029-0175"]},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Mohammad Sadrosadati","raw_affiliation_strings":["ETH Zürich"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ETH Zürich","institution_ids":["https://openalex.org/I35440088"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050695684","display_name":"Onur Mutlu","orcid":"https://orcid.org/0000-0002-0075-2312","observed_orcids":["https://orcid.org/0000-0002-0075-2312"]},"institutions":[{"id":"https://openalex.org/I35440088","display_name":"ETH Zurich","ror":"https://ror.org/05a28rw58","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I35440088"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Onur Mutlu","raw_affiliation_strings":["ETH Zürich"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ETH Zürich","institution_ids":["https://openalex.org/I35440088"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.35962194,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"467","last_page":"469"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.49000000953674316,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.49000000953674316,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10317","display_name":"Advanced Database Systems and Queries","score":0.45019999146461487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.020400000736117363,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/in-memory-computing","display_name":"in-memory computing","score":0.9950000047683716},{"id":"https://openalex.org/keywords/upmem","display_name":"UPMEM","score":0.8690000176429749},{"id":"https://openalex.org/keywords/data-centric-architecture","display_name":"data-centric architecture","score":0.6420000195503235},{"id":"https://openalex.org/keywords/data-analytics","display_name":"data analytics","score":0.5619999766349792},{"id":"https://openalex.org/keywords/database-management-systems","display_name":"database management systems","score":0.8040000200271606},{"id":"https://openalex.org/keywords/dram","display_name":"DRAM","score":0.7250000238418579},{"id":"https://openalex.org/keywords/scratchpad-memory","display_name":"scratchpad memory","score":0.8679999709129333},{"id":"https://openalex.org/keywords/analytical-data-processing","display_name":"analytical data processing","score":0.5120000243186951}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8039000034332275},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7537999749183655},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.5565999746322632},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.527899980545044},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.5091000199317932},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.4733999967575073},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4212000072002411},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.41769999265670776},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4147000014781952},{"id":"https://openalex.org/C79158427","wikidata":"https://www.wikidata.org/wiki/Q485396","display_name":"Analytics","level":2,"score":0.3610000014305115},{"id":"https://openalex.org/C20556612","wikidata":"https://www.wikidata.org/wiki/Q4469374","display_name":"Volume (thermodynamics)","level":2,"score":0.3582000136375427},{"id":"https://openalex.org/C47487241","wikidata":"https://www.wikidata.org/wiki/Q5227230","display_name":"Data access","level":2,"score":0.35339999198913574},{"id":"https://openalex.org/C1668388","wikidata":"https://www.wikidata.org/wiki/Q1149776","display_name":"Data management","level":2,"score":0.34549999237060547},{"id":"https://openalex.org/C75684735","wikidata":"https://www.wikidata.org/wiki/Q858810","display_name":"Big data","level":2,"score":0.33250001072883606},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.32679998874664307},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.3228999972343445},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3009999990463257},{"id":"https://openalex.org/C138827492","wikidata":"https://www.wikidata.org/wiki/Q6661985","display_name":"Data processing","level":2,"score":0.29330000281333923},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.2930999994277954},{"id":"https://openalex.org/C72108876","wikidata":"https://www.wikidata.org/wiki/Q844565","display_name":"Transaction processing","level":3,"score":0.2872999906539917},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.28439998626708984},{"id":"https://openalex.org/C88196245","wikidata":"https://www.wikidata.org/wiki/Q8034984","display_name":"Working set","level":2,"score":0.2784999907016754},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.265500009059906},{"id":"https://openalex.org/C67186912","wikidata":"https://www.wikidata.org/wiki/Q367664","display_name":"Data modeling","level":2,"score":0.26190000772476196},{"id":"https://openalex.org/C201932085","wikidata":"https://www.wikidata.org/wiki/Q642514","display_name":"Online analytical processing","level":3,"score":0.26159998774528503},{"id":"https://openalex.org/C112118009","wikidata":"https://www.wikidata.org/wiki/Q4925872","display_name":"Data processing system","level":2,"score":0.25839999318122864},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.257999986410141},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.25780001282691956},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.257099986076355},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2533000111579895}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/pact65351.2025.00050","doi":"https://doi.org/10.1109/pact65351.2025.00050","is_oa":false,"landing_page_url":"https://doi.org/10.1109/pact65351.2025.00050","pdf_url":null,"source":{"id":"https://openalex.org/S4210194525","display_name":"International Conference on Parallel Architectures and Compilation Techniques (PACT)","issn_l":"1089-795X","issn":["1089-795X","2641-7944"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 34th International Conference on Parallel Architectures and Compilation Techniques (PACT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":52,"referenced_works":["https://openalex.org/W2002555321","https://openalex.org/W2053725099","https://openalex.org/W2056118148","https://openalex.org/W2058490651","https://openalex.org/W2081729575","https://openalex.org/W2085601491","https://openalex.org/W2094332102","https://openalex.org/W2112547256","https://openalex.org/W2112980698","https://openalex.org/W2116784058","https://openalex.org/W2124969960","https://openalex.org/W2135965542","https://openalex.org/W2146276996","https://openalex.org/W2164577583","https://openalex.org/W2170257519","https://openalex.org/W2433160560","https://openalex.org/W2545376626","https://openalex.org/W2612389039","https://openalex.org/W2612905056","https://openalex.org/W2765234579","https://openalex.org/W2766489088","https://openalex.org/W2766890412","https://openalex.org/W2794842046","https://openalex.org/W2801000640","https://openalex.org/W2944576035","https://openalex.org/W2946017187","https://openalex.org/W2946571646","https://openalex.org/W2950138172","https://openalex.org/W2952438573","https://openalex.org/W2980688670","https://openalex.org/W2997464342","https://openalex.org/W3005783121","https://openalex.org/W3016765354","https://openalex.org/W3111721177","https://openalex.org/W3134177848","https://openalex.org/W3161639821","https://openalex.org/W3201951111","https://openalex.org/W4235631643","https://openalex.org/W4284886102","https://openalex.org/W4285121610","https://openalex.org/W4293731257","https://openalex.org/W4301607055","https://openalex.org/W4312576111","https://openalex.org/W4313047559","https://openalex.org/W4381326936","https://openalex.org/W4381894570","https://openalex.org/W4393407315","https://openalex.org/W4403334538","https://openalex.org/W4405623414","https://openalex.org/W4407425079","https://openalex.org/W4411233331","https://openalex.org/W4411411740"],"related_works":["https://openalex.org/W6910664572","https://openalex.org/W4380624072","https://openalex.org/W6943730732","https://openalex.org/W4417403824","https://openalex.org/W4285121610","https://openalex.org/W7125359269","https://openalex.org/W4313047559","https://openalex.org/W3163089509","https://openalex.org/W3202917172","https://openalex.org/W7078110344"],"abstract_inverted_index":{"Database":[0],"management":[1],"systems":[2,54],"(DBMSs)":[3],"[1]":[4],"provide":[5],"a":[6,116,152],"standardized":[7],"interface":[8],"for":[9],"managing":[10],"large":[11],"amounts":[12],"of":[13,21,115,118,131,139,173],"data":[14,22,35,63,75],"[2].":[15],"However,":[16],"due":[17],"to":[18,151],"the":[19,58,74,79,95],"volume":[20],"DBMSs":[23],"process,":[24],"current":[25],"processor-centric":[26,46],"architectures":[27],"(e.g.,":[28],"CPUs,":[29],"GPUs,":[30],"and":[31,166],"FPGAs)":[32],"suffer":[33],"from":[34],"movement":[36],"bottlenecks":[37],"when":[38],"executing":[39],"key":[40],"DBMS":[41],"operations":[42],"[3,":[43],"4].":[44],"Unlike":[45],"architectures,":[47,49,92],"data-centric":[48],"such":[50,93],"as":[51,94],"processing-in-memory":[52],"(PIM)":[53],"[4\u201355],":[55],"can":[56],"mitigate":[57],"main":[59,80],"memory":[60,164,175],"bottleneck":[61],"in":[62,136],"analytics":[64],"[4,":[65],"22,":[66],"33,":[67],"38,":[68],"56\u201361]":[69],"by":[70],"performing":[71],"computation":[72],"where":[73],"resides,":[76],"i.e.,":[77],"inside":[78],"memory.":[81],"Recently,":[82],"industry":[83],"has":[84,148],"announced":[85],"several":[86],"PIM":[87,91,97,104,119,128,141,146],"designs,":[88],"including":[89],"general-purpose":[90],"UPMEM":[96,103,127,145],"system":[98,105],"[44,":[99],"56,":[100],"62].":[101],"The":[102],"is":[106],"implemented":[107],"on":[108],"standard":[109],"DDR4-2400":[110],"DRAM":[111,133,159],"technology.":[112],"It":[113],"consists":[114,130],"set":[117],"cores":[120,142],"with":[121],"private":[122],"DRAM,":[123],"called":[124],"DPUs.":[125],"An":[126],"rank":[129],"8":[132,140],"banks,":[134],"which":[135],"turn":[137],"consist":[138],"each.":[143],"Each":[144],"core":[147],"exclusive":[149],"access":[150],"$\\mathbf{6":[153],"4":[154],"~":[155],"M":[156],"i":[157,171],"B}$":[158,172],"(MRAM),":[160],"64":[161],"KiB":[162],"scratchpad":[163],"(WRAM),":[165],"$\\mathbf{2":[167],"4}":[168],"\\mathbf{~":[169],"K":[170],"instruction":[174],"(IRAM).":[176]},"counts_by_year":[],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2025-12-16T00:00:00"}