{"id":"https://openalex.org/W4409488013","doi":"https://doi.org/10.4018/979-8-3693-8084-0.ch002","title":"Cutting-Edge Methodologies for Low Power Design in VLSI Circuits","display_name":"Cutting-Edge Methodologies for Low Power Design in VLSI Circuits","publication_year":2025,"publication_date":"2025-04-16","ids":{"openalex":"https://openalex.org/W4409488013","doi":"https://doi.org/10.4018/979-8-3693-8084-0.ch002"},"language":"en","primary_location":{"id":"doi:10.4018/979-8-3693-8084-0.ch002","doi":"https://doi.org/10.4018/979-8-3693-8084-0.ch002","is_oa":false,"landing_page_url":"https://doi.org/10.4018/979-8-3693-8084-0.ch002","pdf_url":null,"source":{"id":"https://openalex.org/S4306463409","display_name":"IGI Global eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310320424","host_organization_name":"IGI Global","host_organization_lineage":["https://openalex.org/P4310320424"],"host_organization_lineage_names":["IGI Global"],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Exploring the Intricacies of Digital and Analog VLSI","raw_type":"book-chapter"},"volume":{"id":"https://openalex.org/W4409487978","display_name":"Exploring the Intricacies of Digital and Analog VLSI"},"type":"book-chapter","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068081247","display_name":"Uma Sharma","orcid":"https://orcid.org/0000-0001-6156-0552","observed_orcids":["https://orcid.org/0000-0001-6156-0552"]},"institutions":[{"id":"https://openalex.org/I4405257060","display_name":"Ajay Kumar Garg Engineering College","ror":"https://ror.org/04vddbq17","country_code":"IN","type":"education","lineage":["https://openalex.org/I4405257060"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Uma Sharma","raw_affiliation_strings":["Ajay Kumar Garg Engineering College, India"],"raw_orcid":"https://orcid.org/0000-0001-6156-0552","affiliations":[{"raw_affiliation_string":"Ajay Kumar Garg Engineering College, India","institution_ids":["https://openalex.org/I4405257060"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010260191","display_name":"Tukur Gupta","orcid":"https://orcid.org/0000-0003-3853-7068","observed_orcids":["https://orcid.org/0000-0003-3853-7068"]},"institutions":[{"id":"https://openalex.org/I4405257060","display_name":"Ajay Kumar Garg Engineering College","ror":"https://ror.org/04vddbq17","country_code":"IN","type":"education","lineage":["https://openalex.org/I4405257060"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Tukur Gupta","raw_affiliation_strings":["Ajay Kumar Garg Engineering College, India"],"raw_orcid":"https://orcid.org/0000-0003-3853-7068","affiliations":[{"raw_affiliation_string":"Ajay Kumar Garg Engineering College, India","institution_ids":["https://openalex.org/I4405257060"]}]},{"author_position":"last","author":{"id":null,"display_name":"Neeti Bansal","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4405257060","display_name":"Ajay Kumar Garg Engineering College","ror":"https://ror.org/04vddbq17","country_code":"IN","type":"education","lineage":["https://openalex.org/I4405257060"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Neeti Bansal","raw_affiliation_strings":["Ajay Kumar Garg Engineering College, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Ajay Kumar Garg Engineering College, India","institution_ids":["https://openalex.org/I4405257060"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4405257060"],"apc_list":null,"apc_paid":null,"fwci":2.8293,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.8229414,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"49","last_page":"86"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.00139999995008111,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-power-vlsi-design","display_name":"low-power VLSI design","score":0.8980000019073486},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6320000290870667},{"id":"https://openalex.org/keywords/finfet","display_name":"FinFET","score":0.9879999756813049},{"id":"https://openalex.org/keywords/carbon-nanotube-field-effect-transistors","display_name":"carbon nanotube field-effect transistors","score":0.972000002861023},{"id":"https://openalex.org/keywords/floating-gate-mosfet","display_name":"floating gate MOSFET","score":0.9940000176429749},{"id":"https://openalex.org/keywords/energy-efficiency","display_name":"energy efficiency","score":0.6589999794960022},{"id":"https://openalex.org/keywords/circuit-speed","display_name":"circuit speed","score":0.5630000233650208},{"id":"https://openalex.org/keywords/computer-simulation","display_name":"computer simulation","score":0.6119999885559082}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7800447940826416},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.6567397117614746},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4597035348415375},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45863568782806396},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4291665256023407},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42039719223976135},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33041107654571533},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2627664804458618},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2296295464038849},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0937991738319397},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07219848036766052},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.4018/979-8-3693-8084-0.ch002","doi":"https://doi.org/10.4018/979-8-3693-8084-0.ch002","is_oa":false,"landing_page_url":"https://doi.org/10.4018/979-8-3693-8084-0.ch002","pdf_url":null,"source":{"id":"https://openalex.org/S4306463409","display_name":"IGI Global eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310320424","host_organization_name":"IGI Global","host_organization_lineage":["https://openalex.org/P4310320424"],"host_organization_lineage_names":["IGI Global"],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Exploring the Intricacies of Digital and Analog VLSI","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.7207000255584717,"display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":56,"referenced_works":["https://openalex.org/W72952959","https://openalex.org/W432398127","https://openalex.org/W1518236483","https://openalex.org/W1972432458","https://openalex.org/W1990932710","https://openalex.org/W1994627436","https://openalex.org/W2039718530","https://openalex.org/W2042479232","https://openalex.org/W2053964879","https://openalex.org/W2064889704","https://openalex.org/W2074558871","https://openalex.org/W2075215083","https://openalex.org/W2079171572","https://openalex.org/W2080384504","https://openalex.org/W2109011519","https://openalex.org/W2119208394","https://openalex.org/W2122277193","https://openalex.org/W2124278579","https://openalex.org/W2125666370","https://openalex.org/W2133932539","https://openalex.org/W2140863609","https://openalex.org/W2141849037","https://openalex.org/W2142928386","https://openalex.org/W2145139824","https://openalex.org/W2154204908","https://openalex.org/W2186444698","https://openalex.org/W2324447467","https://openalex.org/W2474272145","https://openalex.org/W2562219396","https://openalex.org/W2583022538","https://openalex.org/W2746900585","https://openalex.org/W2784538817","https://openalex.org/W2803057706","https://openalex.org/W2809178110","https://openalex.org/W2932812237","https://openalex.org/W2972208418","https://openalex.org/W3013360491","https://openalex.org/W3016940091","https://openalex.org/W3035181099","https://openalex.org/W3109220260","https://openalex.org/W3118634548","https://openalex.org/W3119188804","https://openalex.org/W3135845221","https://openalex.org/W3145549963","https://openalex.org/W3178582395","https://openalex.org/W3179096051","https://openalex.org/W3194437664","https://openalex.org/W3210323816","https://openalex.org/W4220768967","https://openalex.org/W4255061993","https://openalex.org/W4284958967","https://openalex.org/W4310436596","https://openalex.org/W4313560947","https://openalex.org/W4391213231","https://openalex.org/W4401809242","https://openalex.org/W4404725679"],"related_works":["https://openalex.org/W4402193820","https://openalex.org/W7128167357","https://openalex.org/W7167356688","https://openalex.org/W7128772706","https://openalex.org/W4386387114","https://openalex.org/W7212181494","https://openalex.org/W6893180985","https://openalex.org/W7149533929","https://openalex.org/W4232321586","https://openalex.org/W2584096925"],"abstract_inverted_index":{"The":[0,41,86],"rapid":[1],"advancements":[2],"in":[3,33],"Very":[4],"Large":[5],"Scale":[6],"Integration":[7],"(VLSI)":[8],"technology":[9,91,98],"have":[10],"been":[11],"driven":[12],"by":[13,115],"the":[14,108,116,123],"increasing":[15],"demand":[16],"for":[17],"high-performance":[18],"and":[19,52,56,67,84,122],"energy-efficient":[20],"electronic":[21,35],"devices.":[22],"Low":[23],"power":[24,94],"design":[25,44,80],"has":[26],"emerged":[27],"as":[28,50],"a":[29],"critical":[30],"focus":[31],"area":[32],"modern":[34],"systems":[36],"to":[37],"address":[38],"these":[39],"demands.":[40],"chapter":[42],"categorizes":[43],"approaches":[45],"into":[46],"conventional":[47],"methods,":[48],"such":[49],"static":[51],"dynamic":[53],"CMOS":[54],"technologies,":[55],"non-conventional":[57,111],"techniques,":[58],"including":[59],"FinFET,":[60],"Carbon":[61],"Nanotube":[62],"Field":[63],"Effect":[64],"Transistors":[65],"(CNTFET),":[66],"Floating":[68],"Gate":[69],"MOSFET":[70],"(FGMOS).":[71],"A":[72],"comparative":[73],"analysis":[74],"of":[75,110,118,125],"XOR/XNOR":[76],"circuits":[77],"highlights":[78],"their":[79],"characteristics,":[81],"performance":[82],"trade-offs,":[83],"challenges.":[85],"findings":[87],"indicate":[88],"that":[89],"FGMOS":[90],"offers":[92],"superior":[93],"efficiency,":[95],"while":[96],"CNTFET":[97],"significantly":[99],"improves":[100],"circuit":[101],"speed":[102],"at":[103],"lower":[104],"technological":[105],"nodes.":[106],"However,":[107],"adoption":[109],"technologies":[112],"is":[113],"constrained":[114],"lack":[117],"robust":[119],"simulation":[120],"models":[121],"complexity":[124],"fabrication":[126],"processes.":[127]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2025-04-16T00:00:00"}