{"id":"https://openalex.org/W4403722994","doi":"https://doi.org/10.1109/les.2024.3485632","title":"An Optimized Structure for Data Alignment Logic in Parallel CRC Computing Circuits","display_name":"An Optimized Structure for Data Alignment Logic in Parallel CRC Computing Circuits","publication_year":2024,"publication_date":"2024-10-24","ids":{"openalex":"https://openalex.org/W4403722994","doi":"https://doi.org/10.1109/les.2024.3485632"},"language":"en","primary_location":{"id":"doi:10.1109/les.2024.3485632","doi":"https://doi.org/10.1109/les.2024.3485632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2024.3485632","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-1","norway-1","poland-70","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041272915","display_name":"Yuchen Nie","orcid":"https://orcid.org/0009-0004-2657-9564","observed_orcids":["https://orcid.org/0009-0004-2657-9564"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yuchen Nie","raw_affiliation_strings":["R&#x0026;D Innovation Centre, Lishan Microelectronics Co, Xi&#x2019;an, China","Lishan Microelectronics Co, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0009-0004-2657-9564","affiliations":[{"raw_affiliation_string":"R&#x0026;D Innovation Centre, Lishan Microelectronics Co, Xi&#x2019;an, China","institution_ids":[]},{"raw_affiliation_string":"Lishan Microelectronics Co, Xi&#x2019;an, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109583720","display_name":"Sheng Zhong","orcid":"https://orcid.org/0000-0001-8466-3730","observed_orcids":["https://orcid.org/0000-0001-8466-3730"]},"institutions":[{"id":"https://openalex.org/I37802460","display_name":"Northwest University","ror":"https://ror.org/00z3td547","country_code":"CN","type":"education","lineage":["https://openalex.org/I37802460"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Sheng Zhong","raw_affiliation_strings":["School of Information Science &#x0026; Technology, Northwest University, Xi&#x2019;an, China","Northwest University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0001-8466-3730","affiliations":[{"raw_affiliation_string":"School of Information Science &#x0026; Technology, Northwest University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I37802460"]},{"raw_affiliation_string":"Northwest University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I37802460"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089923171","display_name":"Nailiang Kuang","orcid":"https://orcid.org/0000-0002-1839-7566","observed_orcids":["https://orcid.org/0000-0002-1839-7566"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Nailiang Kuang","raw_affiliation_strings":["R&#x0026;D Innovation Centre, Lishan Microelectronics Co, Xi&#x2019;an, China","Lishan Microelectronics Co, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-1839-7566","affiliations":[{"raw_affiliation_string":"R&#x0026;D Innovation Centre, Lishan Microelectronics Co, Xi&#x2019;an, China","institution_ids":[]},{"raw_affiliation_string":"Lishan Microelectronics Co, Xi&#x2019;an, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103015206","display_name":"Yuting Ji","orcid":"https://orcid.org/0009-0007-3227-6721","observed_orcids":["https://orcid.org/0009-0007-3227-6721"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yuting Ji","raw_affiliation_strings":["R&#x0026;D Innovation Centre, Lishan Microelectronics Co, Xi&#x2019;an, China","Lishan Microelectronics Co, Xi&#x2019;an, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"R&#x0026;D Innovation Centre, Lishan Microelectronics Co, Xi&#x2019;an, China","institution_ids":[]},{"raw_affiliation_string":"Lishan Microelectronics Co, Xi&#x2019;an, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043852046","display_name":"Hangzai Luo","orcid":"https://orcid.org/0000-0003-3354-5739","observed_orcids":["https://orcid.org/0000-0003-3354-5739"]},"institutions":[{"id":"https://openalex.org/I37802460","display_name":"Northwest University","ror":"https://ror.org/00z3td547","country_code":"CN","type":"education","lineage":["https://openalex.org/I37802460"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hangzai Luo","raw_affiliation_strings":["School of Information Science &#x0026; Technology, Northwest University, Xi&#x2019;an, China","Northwest University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0003-3354-5739","affiliations":[{"raw_affiliation_string":"School of Information Science &#x0026; Technology, Northwest University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I37802460"]},{"raw_affiliation_string":"Northwest University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I37802460"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2495,"currency":"USD","value_usd":2495},"apc_paid":null,"fwci":0.4349,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.55829109,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":"17","issue":"2","first_page":"91","last_page":"94"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.46140000224113464,"subfield":{"id":"https://openalex.org/subfields/2607","display_name":"Discrete Mathematics and Combinatorics"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.46140000224113464,"subfield":{"id":"https://openalex.org/subfields/2607","display_name":"Discrete Mathematics and Combinatorics"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.17260000109672546,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.09709999710321426,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cyclic-redundancy-check","display_name":"cyclic redundancy check","score":0.9210000038146973},{"id":"https://openalex.org/keywords/pipelining","display_name":"pipelining","score":0.8320000171661377},{"id":"https://openalex.org/keywords/fpga-implementation","display_name":"FPGA implementation","score":0.7369999885559082},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"energy consumption","score":0.7160000205039978},{"id":"https://openalex.org/keywords/clock-frequency","display_name":"clock frequency","score":0.796999990940094}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8647914528846741},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5714440941810608},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5495313405990601},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4796195924282074},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39474108815193176},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.39453673362731934},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3794109523296356},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.36612439155578613},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.331091046333313},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3132088780403137},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10718441009521484},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/les.2024.3485632","doi":"https://doi.org/10.1109/les.2024.3485632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2024.3485632","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-1","norway-1","poland-70","russia-white-list-2"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5378999710083008,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2017822449","https://openalex.org/W2093030849","https://openalex.org/W2102695687","https://openalex.org/W2114415454","https://openalex.org/W2126528878","https://openalex.org/W2519898682","https://openalex.org/W2583490885","https://openalex.org/W3029149166","https://openalex.org/W4385990188"],"related_works":["https://openalex.org/W2162580874","https://openalex.org/W2110269656","https://openalex.org/W2118117143","https://openalex.org/W4404240573","https://openalex.org/W2378512993","https://openalex.org/W4385990188","https://openalex.org/W4311839535","https://openalex.org/W2319190164","https://openalex.org/W1532784917","https://openalex.org/W3016699175"],"abstract_inverted_index":{"In":[0],"bit-level":[1],"parallel":[2,24,48,92,105],"cyclic":[3],"redundancy":[4],"check":[5],"(CRC)":[6],"computing":[7,93,106],"circuits,":[8],"it":[9],"is":[10,36],"possible":[11],"that":[12,51,116],"the":[13,23,28,34,40,52,74,81,86,91,99,104],"input":[14],"data":[15,53,75,82,100],"length":[16],"may":[17],"not":[18],"be":[19],"evenly":[20],"divisible":[21],"by":[22,90],"bit":[25],"width.":[26],"Consequently,":[27],"incorporation":[29],"of":[30,46,60,72,129,143],"alignment":[31,54,76,83,101],"logic":[32,84,102],"into":[33],"circuit":[35],"necessary":[37],"to":[38,62,132,146,149],"discard":[39],"invalid":[41],"data.":[42],"A":[43],"comprehensive":[44],"analysis":[45],"256-bits":[47],"circuits":[49,117,150],"reveals":[50],"structure":[55,68,79,88,121],"introduces":[56],"an":[57,123],"additional":[58],"delay":[59],"46%":[61],"53.8%.":[63],"We":[64],"proposed":[65],"a":[66,70,119,135,152],"prealignment":[67,120],"as":[69],"means":[71],"optimizing":[73],"logic.":[77,107],"This":[78],"separates":[80],"from":[85],"loopback":[87],"generated":[89],"logic,":[94],"allowing":[95],"for":[96,141],"pipelining":[97],"between":[98],"and":[103,134],"On-board":[108],"tests":[109],"on":[110],"field-programmable":[111],"gate":[112],"arrays":[113],"(FPGAs)":[114],"show":[115],"with":[118],"have":[122],"increase":[124],"in":[125,137],"maximum":[126],"clock":[127],"frequency":[128],"about":[130,144],"95%":[131],"175%":[133],"reduction":[136],"average":[138],"energy":[139],"consumption":[140],"computation":[142],"40.6%":[145],"55%":[147],"compared":[148],"using":[151],"shift-alignment":[153],"structure.":[154]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-09-23T05:00:35.095934","created_date":"2024-10-25T00:00:00"}
