{"id":"https://openalex.org/W4403552503","doi":"https://doi.org/10.1007/978-981-97-5269-0_22","title":"High Throughput Multiple Device Diagnosis System for Hierarchical Test Designs","display_name":"High Throughput Multiple Device Diagnosis System for Hierarchical Test Designs","publication_year":2024,"publication_date":"2024-10-18","ids":{"openalex":"https://openalex.org/W4403552503","doi":"https://doi.org/10.1007/978-981-97-5269-0_22"},"language":"en","primary_location":{"id":"doi:10.1007/978-981-97-5269-0_22","doi":"https://doi.org/10.1007/978-981-97-5269-0_22","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-97-5269-0_22","pdf_url":null,"source":{"id":"https://openalex.org/S4210179954","display_name":"Lecture notes in electrical engineering","issn_l":"1876-1100","issn":["1876-1100","1876-1119"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Electrical Engineering","raw_type":"book-chapter"},"volume":{"id":"https://openalex.org/W4403552573","display_name":"Emerging VLSI Devices, Circuits and Architectures"},"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Atul Chhabra","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210111610","display_name":"Cadence Design Systems (India)","ror":"https://ror.org/027qdw603","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210111610","https://openalex.org/I66217453"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Atul Chhabra","raw_affiliation_strings":["Cadence Design Systems, Noida, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Noida, India","institution_ids":["https://openalex.org/I4210111610"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015398810","display_name":"Bharath Nandakumar","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210111610","display_name":"Cadence Design Systems (India)","ror":"https://ror.org/027qdw603","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210111610","https://openalex.org/I66217453"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bharath Nandakumar","raw_affiliation_strings":["Cadence Design Systems, Noida, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Noida, India","institution_ids":["https://openalex.org/I4210111610"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048610158","display_name":"Sameer Chillarige","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210111610","display_name":"Cadence Design Systems (India)","ror":"https://ror.org/027qdw603","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210111610","https://openalex.org/I66217453"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sameer Chillarige","raw_affiliation_strings":["Cadence Design Systems, Noida, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Noida, India","institution_ids":["https://openalex.org/I4210111610"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Dushyant Malhotra","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210111610","display_name":"Cadence Design Systems (India)","ror":"https://ror.org/027qdw603","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210111610","https://openalex.org/I66217453"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Dushyant Malhotra","raw_affiliation_strings":["Cadence Design Systems, Noida, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Noida, India","institution_ids":["https://openalex.org/I4210111610"]}]},{"author_position":"last","author":{"id":null,"display_name":"Vatsal Grover","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210111610","display_name":"Cadence Design Systems (India)","ror":"https://ror.org/027qdw603","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210111610","https://openalex.org/I66217453"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vatsal Grover","raw_affiliation_strings":["Cadence Design Systems, Noida, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Noida, India","institution_ids":["https://openalex.org/I4210111610"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210111610"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14851195,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"263","last_page":"272"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.0006000000284984708,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.00039999998989515007,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fault-diagnosis","display_name":"fault diagnosis","score":0.7179999947547913},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"automatic test pattern generation","score":0.8619999885559082},{"id":"https://openalex.org/keywords/design-for-testability","display_name":"design for testability","score":0.824999988079071},{"id":"https://openalex.org/keywords/multi-core-soc","display_name":"multi-core SoC","score":0.6169999837875366}],"concepts":[{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.7458533048629761},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6073712110519409},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.5260895490646362},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3749525249004364},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3360503315925598},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.32396194338798523},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1915629506111145},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17444035410881042},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.13163918256759644},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-981-97-5269-0_22","doi":"https://doi.org/10.1007/978-981-97-5269-0_22","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-981-97-5269-0_22","pdf_url":null,"source":{"id":"https://openalex.org/S4210179954","display_name":"Lecture notes in electrical engineering","issn_l":"1876-1100","issn":["1876-1100","1876-1119"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Electrical Engineering","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4943999946117401}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1592824829","https://openalex.org/W1863819993","https://openalex.org/W2011616113","https://openalex.org/W2063435983","https://openalex.org/W2118236186","https://openalex.org/W2118919916","https://openalex.org/W2134998505","https://openalex.org/W2149132218","https://openalex.org/W2781756121","https://openalex.org/W4233842484"],"related_works":["https://openalex.org/W4386426878","https://openalex.org/W3008534367","https://openalex.org/W7098949939","https://openalex.org/W2781756121","https://openalex.org/W1579849231","https://openalex.org/W2102488932","https://openalex.org/W2417535505","https://openalex.org/W2011616113","https://openalex.org/W2128668921","https://openalex.org/W2170093437"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-10-10T09:11:00.788812","created_date":"2024-10-19T00:00:00"}
