{"id":"https://openalex.org/W4394999","doi":null,"title":"Coprocessor acceleration for domain-specific computing","display_name":"Coprocessor acceleration for domain-specific computing","publication_year":2012,"publication_date":"2012-01-01","ids":{"openalex":"https://openalex.org/W4394999","mag":"4394999"},"language":"en","primary_location":{"id":"mag:4394999","doi":null,"is_oa":false,"landing_page_url":"https://escholarship.org/content/qt1bp8611m/qt1bp8611m.pdf?t=mhjd6f","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null},"volume":null,"type":"article","is_traditional":true,"indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016776689","display_name":"Jason Cong","orcid":"https://orcid.org/0000-0003-2887-6963","observed_orcids":["https://orcid.org/0000-0003-2887-6963"]},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jason Cong","raw_affiliation_strings":["University of California\u2013Los Angeles"],"raw_orcid":"https://orcid.org/0000-0003-2887-6963","affiliations":[{"raw_affiliation_string":"University of California\u2013Los Angeles","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100458990","display_name":"Yi Zou","orcid":"https://orcid.org/0000-0002-4382-4670","observed_orcids":["https://orcid.org/0000-0002-4382-4670"]},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yi Zou","raw_affiliation_strings":["University of California\u2013Los Angeles"],"raw_orcid":"https://orcid.org/0000-0002-4382-4670","affiliations":[{"raw_affiliation_string":"University of California\u2013Los Angeles","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I161318765"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.00048216,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6128000020980835,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6128000020980835,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.3767000138759613,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.002899999963119626,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/gpu-acceleration","display_name":"GPU acceleration","score":0.8069999814033508},{"id":"https://openalex.org/keywords/fpga-acceleration","display_name":"FPGA acceleration","score":0.9639999866485596},{"id":"https://openalex.org/keywords/heterogeneous-computing","display_name":"heterogeneous computing","score":0.7129999995231628},{"id":"https://openalex.org/keywords/lithography-simulation","display_name":"lithography simulation","score":0.9409999847412109},{"id":"https://openalex.org/keywords/medical-image-reconstruction","display_name":"medical image reconstruction","score":0.8899999856948853},{"id":"https://openalex.org/keywords/compressed-sensing","display_name":"compressed sensing","score":0.996999979019165},{"id":"https://openalex.org/keywords/medical-image-registration","display_name":"medical image registration","score":0.9879999756813049},{"id":"https://openalex.org/keywords/fluid-model","display_name":"fluid model","score":0.9010000228881836},{"id":"https://openalex.org/keywords/energy-performance-tradeoff","display_name":"energy-performance trade-off","score":0.8629999756813049},{"id":"https://openalex.org/keywords/scheduling-policies","display_name":"scheduling policies","score":0.8109999895095825}],"concepts":[{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.8922095894813538},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.783122181892395},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6409405469894409},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.6027326583862305},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5034539103507996},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.45929545164108276},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.4493199586868286},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4323538541793823},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40201425552368164},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3533896207809448},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"mag:4394999","doi":null,"is_oa":false,"landing_page_url":"https://escholarship.org/content/qt1bp8611m/qt1bp8611m.pdf?t=mhjd6f","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2415417495","https://openalex.org/W4302386770"],"related_works":["https://openalex.org/W2031135506","https://openalex.org/W6982178128","https://openalex.org/W2899538857","https://openalex.org/W2148380891","https://openalex.org/W3046272470","https://openalex.org/W2129735386","https://openalex.org/W2113755305","https://openalex.org/W2414555482","https://openalex.org/W2096280516","https://openalex.org/W2094553793"],"abstract_inverted_index":{"There":[0],"is":[1,41,124,131],"a":[2,45,55,192],"growing":[3],"trend":[4],"to":[5,8,16,62,80,93,232],"use":[6],"coprocessors":[7],"offload":[9],"and":[10,21,35,64,89,105,128,156,166,181,191,197,246],"accelerate":[11],"domain-specific":[12,200,210],"applications":[13],"in":[14,28,102,141],"order":[15],"obtain":[17],"significant":[18],"performance":[19,180,234],"improvement":[20],"energy/power":[22],"reductions.":[23],"Two":[24],"important":[25],"coprocessor":[26,47,113,201],"components":[27],"the":[29,33,75,85,94,98,121,129,142,179,184,187,214,224],"heterogeneous":[30,225],"system":[31],"are":[32,230],"GPU":[34,37,53],"F-PGA.":[36],"(graphics":[38],"processing":[39],"unit)":[40],"increasingly":[42],"used":[43],"as":[44,240],"data-parallel":[46],"for":[48,116,147,209,220,248],"general":[49],"computations.":[50],"The":[51,237],"newest":[52],"has":[54],"much":[56],"larger":[57],"number":[58],"of":[59,97,194],"cores":[60],"(compared":[61],"CPU)":[63],"very":[65],"high":[66],"peak":[67],"FLOPS.":[68],"FPGA":[69,100],"(field":[70],"programmable":[71],"gate":[72],"array),":[73],"on":[74,125,132,173,223],"other":[76],"hand,":[77],"allows":[78],"users":[79],"customize,":[81],"at":[82],"fine-grain":[83],"level,":[84],"computational":[86,133],"data":[87],"path":[88],"memory":[90],"hierarchy":[91],"according":[92],"exact":[95],"need":[96],"applications.":[99],"excels":[101],"integer":[103],"operations":[104],"bit-level":[106],"operations.":[107],"\r\nThe":[108],"thesis":[109,238],"starts":[110],"with":[111],"several":[112],"acceleration":[114,139,202],"examples":[115,140],"our":[117],"focus":[118],"application":[119,138,189],"domains:":[120],"first":[122],"domain":[123],"VLSICAD":[126],"algorithms":[127],"second":[130],"medical":[134,150,157],"imaging.":[135],"We":[136],"detail":[137],"domains":[143],"including":[144],"lithography":[145],"simulation":[146],"IC":[148],"manufacturing,":[149],"image":[151,158],"reconstruction":[152],"using":[153,160],"compressive":[154],"sensing,":[155],"registration":[159],"fluid":[161],"models.":[162],"Both":[163],"GPU-accelerated":[164],"versions":[165,168],"FPGA-accelerated":[167],"have":[169],"been":[170],"implemented.":[171],"Based":[172],"these":[174],"implementations,":[175],"we":[176,216,241],"then":[177],"analyze":[178],"energy":[182],"trade-offs,":[183],"interaction":[185],"between":[186],"diverse":[188],"requirements":[190],"spectrum":[193],"hardware":[195],"systems,":[196],"how":[198],"those":[199],"case":[203],"studies":[204],"further":[205],"bring":[206],"us":[207],"insights":[208],"architecture":[211,244],"innovations.":[212],"In":[213],"end,":[215],"showcase":[217],"an":[218],"example":[219],"collaborative":[221],"execution":[222],"platform.":[226],"Different":[227],"scheduling":[228],"policies":[229],"needed":[231],"optimize":[233],"or":[235],"energy.":[236],"concludes":[239],"present":[242],"reusable":[243],"templates":[245],"realizations":[247],"futuristic":[249],"accelerator-rich":[250],"CMPs.":[251]},"counts_by_year":[],"updated_date":"2026-08-08T07:41:36.138363","created_date":"2016-06-24T00:00:00"}