{"id":"https://openalex.org/W4393062736","doi":"https://doi.org/10.1109/ises58672.2023.00033","title":"Optimization of Imprecise Multiplier Circuits by using Binary Decision Diagram","display_name":"Optimization of Imprecise Multiplier Circuits by using Binary Decision Diagram","publication_year":2023,"publication_date":"2023-12-18","ids":{"openalex":"https://openalex.org/W4393062736","doi":"https://doi.org/10.1109/ises58672.2023.00033"},"language":"en","primary_location":{"id":"doi:10.1109/ises58672.2023.00033","doi":"https://doi.org/10.1109/ises58672.2023.00033","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/ises58672.2023.00033","pdf_url":null,"source":{"id":"https://openalex.org/S4363605907","display_name":"IEEE International Symposium on Smart Electronic Systems (iSES)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Smart Electronic Systems (iSES)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070056376","display_name":"Pooja Choudhary","orcid":"https://orcid.org/0000-0001-7997-1771","observed_orcids":["https://orcid.org/0000-0001-7997-1771"]},"institutions":[{"id":"https://openalex.org/I83205935","display_name":"Malaviya National Institute of Technology Jaipur","ror":"https://ror.org/0077k1j32","country_code":"IN","type":"education","lineage":["https://openalex.org/I83205935"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pooja Choudhary","raw_affiliation_strings":["Swami Keshvanand Institute of Technology, Management and Gramothan,Dept. of Electronics and Communication Engineering,Jaipur,India","Dept. of Electronics and Communication Engineering, Swami Keshvanand Institute of Technology, Management and Gramothan, Jaipur, India","Malaviya National Institute of Technology, Jaipur, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Swami Keshvanand Institute of Technology, Management and Gramothan,Dept. of Electronics and Communication Engineering,Jaipur,India","institution_ids":[]},{"raw_affiliation_string":"Dept. of Electronics and Communication Engineering, Swami Keshvanand Institute of Technology, Management and Gramothan, Jaipur, India","institution_ids":[]},{"raw_affiliation_string":"Malaviya National Institute of Technology, Jaipur, India","institution_ids":["https://openalex.org/I83205935"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077768587","display_name":"Lava Bhargava","orcid":"https://orcid.org/0000-0002-6852-0227","observed_orcids":["https://orcid.org/0000-0002-6852-0227"]},"institutions":[{"id":"https://openalex.org/I83205935","display_name":"Malaviya National Institute of Technology Jaipur","ror":"https://ror.org/0077k1j32","country_code":"IN","type":"education","lineage":["https://openalex.org/I83205935"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Lava Bhargava","raw_affiliation_strings":["Malaviya National Institute of Technology,Dept. of Electronics and Communication Engineering,Jaipur,India","Dept. of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Malaviya National Institute of Technology,Dept. of Electronics and Communication Engineering,Jaipur,India","institution_ids":["https://openalex.org/I83205935"]},{"raw_affiliation_string":"Dept. of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur, India","institution_ids":["https://openalex.org/I83205935"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066166819","display_name":"G. U. Vinod","orcid":"https://orcid.org/0000-0003-0584-7967","observed_orcids":["https://orcid.org/0000-0003-0584-7967"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G.U. Vinod","raw_affiliation_strings":["Qualcomm, Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Qualcomm, Bangalore, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008000857","display_name":"Ashok Kumar Suhag","orcid":"https://orcid.org/0000-0002-5336-2684","observed_orcids":["https://orcid.org/0000-0002-5336-2684"]},"institutions":[{"id":"https://openalex.org/I1323093577","display_name":"BML Munjal University","ror":"https://ror.org/058ay3j75","country_code":"IN","type":"education","lineage":["https://openalex.org/I1323093577"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ashok Kumar Suhag","raw_affiliation_strings":["BML Munjal University,Dept. of Electronics and Communication Engineering,Haryana,India","Dept. of Electronics and Communication Engineering, BML Munjal University, Haryana, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"BML Munjal University,Dept. of Electronics and Communication Engineering,Haryana,India","institution_ids":["https://openalex.org/I1323093577"]},{"raw_affiliation_string":"Dept. of Electronics and Communication Engineering, BML Munjal University, Haryana, India","institution_ids":["https://openalex.org/I1323093577"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113149219","display_name":"Mashahiro Fujita","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Mashahiro Fujita","raw_affiliation_strings":["VLSI Design and Education Center, University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center, University of Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073587430","display_name":"Virendra Singh","orcid":"https://orcid.org/0000-0002-7035-7844","observed_orcids":["https://orcid.org/0000-0002-7035-7844"]},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Virendra Singh","raw_affiliation_strings":["Indian Institute of Technology,Dept. of Electrical Engineering & Dept. of Computer Science Engineering,Bombay,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Dept. of Electrical Engineering & Dept. of Computer Science Engineering,Bombay,India","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"115","last_page":"120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.5795999765396118,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.5795999765396118,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.4036000072956085,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.0044999998062849045,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/binary-decision-diagrams","display_name":"binary decision diagrams","score":0.8799999952316284},{"id":"https://openalex.org/keywords/lookup-tables","display_name":"look-up table","score":0.6389999985694885},{"id":"https://openalex.org/keywords/energy-consumption-reduction","display_name":"energy consumption reduction","score":0.6740000247955322}],"concepts":[{"id":"https://openalex.org/C3309909","wikidata":"https://www.wikidata.org/wiki/Q864155","display_name":"Binary decision diagram","level":2,"score":0.8092411160469055},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6183913946151733},{"id":"https://openalex.org/C20837028","wikidata":"https://www.wikidata.org/wiki/Q623966","display_name":"Influence diagram","level":3,"score":0.5541505217552185},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5436245203018188},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5287594199180603},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4625067114830017},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2879224717617035},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.2584080696105957},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.23686686158180237},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.18264910578727722},{"id":"https://openalex.org/C84525736","wikidata":"https://www.wikidata.org/wiki/Q831366","display_name":"Decision tree","level":2,"score":0.17872408032417297},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11429643630981445},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10111674666404724},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ises58672.2023.00033","doi":"https://doi.org/10.1109/ises58672.2023.00033","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/ises58672.2023.00033","pdf_url":null,"source":{"id":"https://openalex.org/S4363605907","display_name":"IEEE International Symposium on Smart Electronic Systems (iSES)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on Smart Electronic Systems (iSES)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1994143452","https://openalex.org/W2010935983","https://openalex.org/W2026005150","https://openalex.org/W2053894238","https://openalex.org/W2122701426","https://openalex.org/W2127420616","https://openalex.org/W2140039879","https://openalex.org/W2287282306","https://openalex.org/W2778584731","https://openalex.org/W2948850835","https://openalex.org/W4245905629","https://openalex.org/W4285402651","https://openalex.org/W4308313555","https://openalex.org/W4381746664","https://openalex.org/W4382681663"],"related_works":["https://openalex.org/W2549246813","https://openalex.org/W3086404368","https://openalex.org/W4386936289","https://openalex.org/W4210994207","https://openalex.org/W4414107540","https://openalex.org/W4283799678","https://openalex.org/W4285819999","https://openalex.org/W4405269897","https://openalex.org/W3089547730","https://openalex.org/W3097838904"],"abstract_inverted_index":{"Imprecise":[0],"multipliers":[1],"are":[2],"employed":[3],"to":[4,64],"enhance":[5],"the":[6,10,23,39,56,61,66,71],"efficiency":[7],"and":[8,46,87],"reduce":[9],"power":[11],"consumption":[12],"of":[13,20,32,41,96,115],"arithmetic":[14],"circuits":[15],"while":[16],"tolerating":[17],"acceptable":[18],"levels":[19],"inaccuracy":[21],"in":[22,38,94,112],"outcomes.":[24],"The":[25,98],"multiplier":[26,68,84,90,103,125],"circuit":[27],"has":[28],"a":[29,51,113],"broader":[30],"range":[31],"applications":[33],"within":[34],"embedded":[35],"systems,":[36],"particularly":[37],"fields":[40],"digital":[42],"signal":[43],"processing,":[44],"IoT":[45],"multimedia,":[47],"etc.":[48],"We":[49],"proposed":[50,88,99],"systematic":[52],"formal":[53],"approach":[54],"utilizing":[55],"Look-Up":[57],"Table":[58],"(LUT)":[59],"employing":[60],"Burch":[62,106,118],"method":[63],"evaluate":[65],"imprecise":[67,89,102,124],"based":[69,104],"on":[70,105],"Binary":[72],"Decision":[73],"Diagram":[74],"(BDD)":[75],"considering":[76],"Worst":[77],"Case":[78],"Error":[79],"constraint.":[80],"Implemented":[81],"13":[82],"bit":[83,101],"using":[85],"normal":[86],"shows":[91,108],"98%":[92],"reduction":[93],"number":[95,114],"nodes.":[97],"25":[100],"HL":[107],"an":[109],"89%":[110],"decrement":[111],"nodes":[116],"w.r.t.":[117],"LH":[119],"method.":[120],"BDD":[121],"generation":[122],"for":[123],"is":[126],"75%":[127],"faster":[128],"than":[129],"normal.":[130]},"counts_by_year":[],"updated_date":"2026-11-10T11:39:43.021295","created_date":"2024-03-22T00:00:00"}