{"id":"https://openalex.org/W43627427","doi":null,"title":"Digital VLSI Implementation of a Neural Associative Memory","display_name":"Digital VLSI Implementation of a Neural Associative Memory","publication_year":1997,"publication_date":"1997-01-01","ids":{"openalex":"https://openalex.org/W43627427","mag":"43627427"},"language":"en","primary_location":{"id":"pmh:oai:pub.librecat.org:2286441","doi":null,"is_oa":false,"landing_page_url":"https://pub.uni-bielefeld.de/record/2286441","pdf_url":null,"source":{"id":"https://openalex.org/S4306401671","display_name":"PUB \u2013 Publications at Bielefeld University (Bielefeld University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I20121455","host_organization_name":"Bielefeld University","host_organization_lineage":["https://openalex.org/I20121455"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Heittmann A, Malin J, Pintaske C, R\u00fcckert U. Digital VLSI Implementation of a Neural Associative Memory. In: Klar H, K\u00f6nig A, Ramacher U, eds. <em>Proceedings of the 6th International Conference on Microelectronics for Neural Network, Evolutionary and Fuzzy Systems</em>. Dresden, Germany; 1997: 280-285.","raw_type":"info:eu-repo/semantics/conferenceObject"},"volume":null,"type":"conference-paper","indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033971238","display_name":"Arne Heittmann","orcid":"https://orcid.org/0000-0001-9466-0568","observed_orcids":["https://orcid.org/0000-0001-9466-0568"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Arne Heittmann","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":null,"display_name":"Jennifer A Malin","orcid":"https://orcid.org/0000-0002-8632-9792","observed_orcids":["https://orcid.org/0000-0002-8632-9792"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jennifer A Malin","raw_affiliation_strings":[],"raw_orcid":"https://orcid.org/0000-0002-8632-9792","affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064060107","display_name":"Christoph Pintaske","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Christoph Pintaske","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5043372144","display_name":"Ulrich R\u00fcckert","orcid":"https://orcid.org/0009-0000-0465-9441","observed_orcids":["https://orcid.org/0009-0000-0465-9441"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ulrich R\u00fcckert","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.8453,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.9091555,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.6830999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.6830999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.18369999527931213,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.03610000014305115,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neural-associative-memory","display_name":"neural associative memory","score":0.9860000014305115},{"id":"https://openalex.org/keywords/vlsi-implementation","display_name":"VLSI implementation","score":0.9279999732971191},{"id":"https://openalex.org/keywords/digital-devices","display_name":"digital devices","score":0.39500001072883606},{"id":"https://openalex.org/keywords/associative-memory","display_name":"associative memory","score":0.5809999704360962},{"id":"https://openalex.org/keywords/neural-network","display_name":"artificial neural networks","score":0.7020000219345093}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7350627779960632},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7322920560836792},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.6771288514137268},{"id":"https://openalex.org/C159423971","wikidata":"https://www.wikidata.org/wiki/Q177251","display_name":"Associative property","level":2,"score":0.5779062509536743},{"id":"https://openalex.org/C120620853","wikidata":"https://www.wikidata.org/wiki/Q506355","display_name":"Bidirectional associative memory","level":4,"score":0.5644098520278931},{"id":"https://openalex.org/C2778618852","wikidata":"https://www.wikidata.org/wiki/Q1128613","display_name":"Content-addressable storage","level":4,"score":0.4942805767059326},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4929356575012207},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4924086332321167},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4105831980705261},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.36321932077407837},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29334574937820435},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2907989025115967},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08448469638824463},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"pmh:oai:pub.librecat.org:2286441","doi":null,"is_oa":false,"landing_page_url":"https://pub.uni-bielefeld.de/record/2286441","pdf_url":null,"source":{"id":"https://openalex.org/S4306401671","display_name":"PUB \u2013 Publications at Bielefeld University (Bielefeld University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I20121455","host_organization_name":"Bielefeld University","host_organization_lineage":["https://openalex.org/I20121455"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Heittmann A, Malin J, Pintaske C, R\u00fcckert U. Digital VLSI Implementation of a Neural Associative Memory. In: Klar H, K\u00f6nig A, Ramacher U, eds. <em>Proceedings of the 6th International Conference on Microelectronics for Neural Network, Evolutionary and Fuzzy Systems</em>. Dresden, Germany; 1997: 280-285.","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:pub.uni-bielefeld.de:2286441","doi":null,"is_oa":false,"landing_page_url":"https://pub.uni-bielefeld.de/record/2286441","pdf_url":null,"source":{"id":"https://openalex.org/S4306401624","display_name":"Publikationen an der Universit\u00e4t Bielefeld (Universit\u00e4t Bielefeld)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I20121455","host_organization_name":"Bielefeld University","host_organization_lineage":["https://openalex.org/I20121455"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Heittmann A, Malin J, Pintaske C, R\u00fcckert U. Digital VLSI Implementation of a Neural Associative Memory. In: Klar H, K\u00f6nig A, Ramacher U, eds. <em>Proceedings of the 6th International Conference on Microelectronics for Neural Network, Evolutionary and Fuzzy Systems</em>. Dresden, Germany; 1997: 280-285.","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"mag:43627427","doi":null,"is_oa":false,"landing_page_url":"https://pub.uni-bielefeld.de/publication/2286441","pdf_url":null,"source":{"id":"https://openalex.org/S4306419677","display_name":"International Conference on Microelectronics","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"International Conference on Microelectronics","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"sustainable_development_goals_aurora":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W6990563215","https://openalex.org/W619831047","https://openalex.org/W141197472","https://openalex.org/W6988037576","https://openalex.org/W1661879850","https://openalex.org/W423476059","https://openalex.org/W7074106676","https://openalex.org/W1005030623","https://openalex.org/W1738117396","https://openalex.org/W7049152332"],"abstract_inverted_index":null,"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-09-29T14:09:16.559479","created_date":"2016-06-24T00:00:00"}