{"id":"https://openalex.org/W4362683530","doi":"https://doi.org/10.1109/access.2023.3265327","title":"An Empirical Evaluation of Enhanced Performance Softmax Function in Deep Learning","display_name":"An Empirical Evaluation of Enhanced Performance Softmax Function in Deep Learning","publication_year":2023,"publication_date":"2023-01-01","ids":{"openalex":"https://openalex.org/W4362683530","doi":"https://doi.org/10.1109/access.2023.3265327"},"language":"en","primary_location":{"id":"doi:10.1109/access.2023.3265327","doi":"https://doi.org/10.1109/access.2023.3265327","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2023.3265327","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10093848.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"listed_in":["anvur-scientific","cwts-core","doaj","jufo-1","ki-jl-1","norway-1","oarl","poland-100","russia-white-list-1","vabb-shw"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10093848.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034629402","display_name":"Sumiran Mehra","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sumiran Mehra","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028707436","display_name":"Gopal Raut","orcid":"https://orcid.org/0000-0002-1046-9457","observed_orcids":["https://orcid.org/0000-0002-1046-9457"]},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gopal Raut","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110968478","display_name":"R. D. Purkayastha","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ribhu Das Purkayastha","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068792760","display_name":"Santosh Kumar Vishvakarma","orcid":"https://orcid.org/0000-0003-4223-0077","observed_orcids":["https://orcid.org/0000-0003-4223-0077"]},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Santosh Kumar Vishvakarma","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India"],"raw_orcid":"https://orcid.org/0000-0003-4223-0077","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020508843","display_name":"Anton Biasizzo","orcid":"https://orcid.org/0000-0002-8188-0606","observed_orcids":["https://orcid.org/0000-0002-8188-0606"]},"institutions":[{"id":"https://openalex.org/I3006985408","display_name":"Jo\u017eef Stefan Institute","ror":"https://ror.org/05060sz93","country_code":"SI","type":"facility","lineage":["https://openalex.org/I3006985408"]},{"id":"https://openalex.org/I4210113529","display_name":"Jo\u017eef Stefan International Postgraduate School","ror":"https://ror.org/01hdkb925","country_code":"SI","type":"education","lineage":["https://openalex.org/I4210113529"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"Anton Biasizzo","raw_affiliation_strings":["Jo\u017eef Stefan Institute, Ljubljana, Slovenia"],"raw_orcid":"https://orcid.org/0000-0002-8188-0606","affiliations":[{"raw_affiliation_string":"Jo\u017eef Stefan Institute, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I3006985408","https://openalex.org/I4210113529"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1950,"currency":"USD","value_usd":1950},"apc_paid":{"value":1950,"currency":"USD","value_usd":1950},"fwci":7.5144,"has_fulltext":true,"cited_by_count":42,"citation_normalized_percentile":{"value":0.98359912,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":93,"max":100},"biblio":{"volume":"11","issue":null,"first_page":"34912","last_page":"34924"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.7896000146865845,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.7896000146865845,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.11100000143051147,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.049800001084804535,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/softmax-function","display_name":"softmax","score":0.8330000042915344},{"id":"https://openalex.org/keywords/cordic-algorithm","display_name":"CORDIC algorithm","score":0.8140000104904175},{"id":"https://openalex.org/keywords/deep-neural-network-accelerators","display_name":"deep neural network accelerators","score":0.765999972820282},{"id":"https://openalex.org/keywords/pipelined-hardware-architecture","display_name":"pipelined hardware architecture","score":0.7889999747276306},{"id":"https://openalex.org/keywords/fpga-implementation","display_name":"FPGA implementation","score":0.6439999938011169},{"id":"https://openalex.org/keywords/asic-implementation","display_name":"ASIC implementation","score":0.9049999713897705},{"id":"https://openalex.org/keywords/energy-delay-product","display_name":"energy-delay product","score":0.722000002861023},{"id":"https://openalex.org/keywords/multi-objective-optimization","display_name":"multi-objective optimization","score":0.6140000224113464}],"concepts":[{"id":"https://openalex.org/C188441871","wikidata":"https://www.wikidata.org/wiki/Q7554146","display_name":"Softmax function","level":3,"score":0.8201259970664978},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7507708668708801},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6207287311553955},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.562588632106781},{"id":"https://openalex.org/C58870171","wikidata":"https://www.wikidata.org/wiki/Q116076","display_name":"CORDIC","level":3,"score":0.5432301163673401},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5338277816772461},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5268681645393372},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.49527254700660706},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.48451727628707886},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.45928335189819336},{"id":"https://openalex.org/C193415008","wikidata":"https://www.wikidata.org/wiki/Q639681","display_name":"Network architecture","level":2,"score":0.43398943543434143},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4026143550872803},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3914377689361572},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3349800407886505},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.25403231382369995},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2175796627998352},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2023.3265327","doi":"https://doi.org/10.1109/access.2023.3265327","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2023.3265327","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10093848.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"listed_in":["anvur-scientific","cwts-core","doaj","jufo-1","ki-jl-1","norway-1","oarl","poland-100","russia-white-list-1","vabb-shw"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:a10506300c3341a3b5491e67b2035c12","doi":null,"is_oa":true,"landing_page_url":"https://doaj.org/article/a10506300c3341a3b5491e67b2035c12","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 11, Pp 34912-34924 (2023)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2023.3265327","doi":"https://doi.org/10.1109/access.2023.3265327","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2023.3265327","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10093848.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"listed_in":["anvur-scientific","cwts-core","doaj","jufo-1","ki-jl-1","norway-1","oarl","poland-100","russia-white-list-1","vabb-shw"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[],"study_designs":[],"awards":[{"id":"https://openalex.org/G144364290","display_name":null,"funder_award_id":"876038","funder_id":"https://openalex.org/F4320327207","funder_display_name":"Electronic Components and Systems for European Leadership"},{"id":"https://openalex.org/G1628901744","display_name":null,"funder_award_id":"iRel40","funder_id":"https://openalex.org/F4320327207","funder_display_name":"Electronic Components and Systems for European Leadership"},{"id":"https://openalex.org/G2031606748","display_name":null,"funder_award_id":"876659 [iREL4.0]","funder_id":"https://openalex.org/F4320327207","funder_display_name":"Electronic Components and Systems for European Leadership"},{"id":"https://openalex.org/G2955844747","display_name":null,"funder_award_id":"101007273","funder_id":"https://openalex.org/F4320327207","funder_display_name":"Electronic Components and Systems for European Leadership"},{"id":"https://openalex.org/G4141766493","display_name":null,"funder_award_id":"No. P2-0098","funder_id":"https://openalex.org/F4320322554","funder_display_name":"Javna Agencija za Raziskovalno Dejavnost RS"},{"id":"https://openalex.org/G5266252340","display_name":null,"funder_award_id":"876038 (InSecTT)","funder_id":"https://openalex.org/F4320327207","funder_display_name":"Electronic Components and Systems for European Leadership"},{"id":"https://openalex.org/G7187064094","display_name":null,"funder_award_id":"101007273 (DAIS)","funder_id":"https://openalex.org/F4320327207","funder_display_name":"Electronic Components and Systems for European Leadership"},{"id":"https://openalex.org/G7377157691","display_name":null,"funder_award_id":"876659","funder_id":"https://openalex.org/F4320327207","funder_display_name":"Electronic Components and Systems for European Leadership"},{"id":"https://openalex.org/G791504897","display_name":"Computer Structures and Systems","funder_award_id":"P2-0098","funder_id":"https://openalex.org/F4320322554","funder_display_name":"Javna Agencija za Raziskovalno Dejavnost RS"}],"funders":[{"id":"https://openalex.org/F4320310119","display_name":"Ministry of Communication and Information Technology","ror":"https://ror.org/05nmnwa45"},{"id":"https://openalex.org/F4320318630","display_name":"Irish Research eLibrary","ror":"https://ror.org/05c347015"},{"id":"https://openalex.org/F4320322554","display_name":"Javna Agencija za Raziskovalno Dejavnost RS","ror":"https://ror.org/059bp8k51"},{"id":"https://openalex.org/F4320322724","display_name":"Ministry of Education, India","ror":"https://ror.org/048xjjh50"},{"id":"https://openalex.org/F4320327207","display_name":"Electronic Components and Systems for European Leadership","ror":"https://ror.org/02afwgc64"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4362683530.pdf","grobid_xml":"https://content.openalex.org/works/W4362683530.grobid-xml"},"referenced_works_count":29,"referenced_works":["https://openalex.org/W1998379075","https://openalex.org/W2042519306","https://openalex.org/W2102113734","https://openalex.org/W2115452265","https://openalex.org/W2126730305","https://openalex.org/W2136045037","https://openalex.org/W2150633168","https://openalex.org/W2299244345","https://openalex.org/W2550277900","https://openalex.org/W2626778328","https://openalex.org/W2751777443","https://openalex.org/W2767072113","https://openalex.org/W2903640996","https://openalex.org/W2910396952","https://openalex.org/W2914968962","https://openalex.org/W2937064326","https://openalex.org/W2946480111","https://openalex.org/W3036061420","https://openalex.org/W3044527724","https://openalex.org/W3046387293","https://openalex.org/W3047364742","https://openalex.org/W3084604851","https://openalex.org/W3090555870","https://openalex.org/W3124625166","https://openalex.org/W3132482843","https://openalex.org/W3136354122","https://openalex.org/W3137649401","https://openalex.org/W3211454547","https://openalex.org/W4285676448"],"related_works":["https://openalex.org/W3036061420","https://openalex.org/W3046387293","https://openalex.org/W2910396952","https://openalex.org/W3082834449","https://openalex.org/W3090555870","https://openalex.org/W7164038173","https://openalex.org/W4381329096","https://openalex.org/W4406754787","https://openalex.org/W4410810284","https://openalex.org/W2906917284"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"an":[3],"enhanced-performance,":[4],"hardware-efficient":[5],"Softmax":[6,15],"Function":[7],"(SF)":[8],"for":[9,73,105,124,146],"a":[10,97,159],"deep":[11,23,89],"neural":[12,35],"network":[13],"accelerator.":[14],"is":[16,27,52,71,114,122,129,144],"used":[17,29],"in":[18,22,30,45,87,167,191],"the":[19,74,88,92,101,106,168,184],"classification":[20],"layer":[21],"learning":[24,90],"models":[25],"and":[26,39,55,77,119,135,174,196],"also":[28],"hidden":[31],"layers":[32],"of":[33,50,103,108,152,163,170,193],"advanced":[34],"networks":[36],"like":[37],"Transformer":[38],"Capsule":[40],"networks.":[41],"The":[42,111,127,156],"major":[43],"challenge":[44],"designing":[46],"efficient":[47],"hardware":[48],"architecture":[49,70],"SF":[51,94,128],"complex":[53],"exponential":[54],"division":[56],"computational":[57],"sub-blocks.":[58],"Utilizing":[59],"mutual":[60],"exclusivity":[61],"ofCO-ordinate":[62],"Rotational":[63],"DIgital":[64],"Computer(CORDIC)":[65],"algorithm,":[66],"hardware-optimized":[67],"pipelined":[68],"CORDIC-based":[69],"considered":[72],"area,":[75,194],"power,":[76,195],"enhanced":[78],"throughput":[79],"design.":[80],"In":[81],"order":[82],"to":[83,116,200],"maintain":[84],"good":[85],"accuracy":[86,104,121,161],"models,":[91],"proposed":[93,112,185],"design":[95,113,157,186],"undergoes":[96],"Pareto":[98],"study":[99],"on":[100],"variation":[102],"number":[107],"pipeline":[109],"stages.":[110],"quantized":[115],"16-bit":[117],"precision,":[118],"inference":[120],"validated":[123],"various":[125],"datasets.":[126],"prototyped":[130],"using":[131],"Xilinx":[132],"Zynq":[133],"FPGA":[134],"can":[136],"be":[137],"operated":[138],"at":[139,150],"685MHz.":[140],"Also,":[141],"ASIC":[142],"implementation":[143],"performed":[145],"45nm":[147],"technology":[148],"node":[149],"5GHz":[151],"maximum":[153],"operating":[154],"frequency.":[155],"achieves":[158,187],"validation":[160],"loss":[162],"less":[164],"than":[165],"2%":[166],"account":[169],"reduced":[171],"silicon":[172],"area":[173],"Energy-Delay-Product(EDP)":[175],"(by":[176],"12\u00d7).":[177],"Post":[178],"synthesis":[179],"simulation":[180],"result":[181],"illustrates":[182],"that":[183],"3\u00d7":[188],"better":[189],"performance":[190],"terms":[192],"logic":[197],"delay":[198],"compared":[199],"state-of-the-art":[201],"architectures.":[202]},"counts_by_year":[{"year":2026,"cited_by_count":10},{"year":2025,"cited_by_count":21},{"year":2024,"cited_by_count":9},{"year":2023,"cited_by_count":2}],"updated_date":"2026-11-10T11:39:43.021295","created_date":"2023-04-08T00:00:00"}