{"id":"https://openalex.org/W4312992159","doi":"https://doi.org/10.1109/tvlsi.2022.3220339","title":"Complementary FET (CFET) Standard Cell Design for Low Parasitics and Its Impact on VLSI Prediction at 3-nm Process","display_name":"Complementary FET (CFET) Standard Cell Design for Low Parasitics and Its Impact on VLSI Prediction at 3-nm Process","publication_year":2022,"publication_date":"2022-11-21","ids":{"openalex":"https://openalex.org/W4312992159","doi":"https://doi.org/10.1109/tvlsi.2022.3220339"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3220339","doi":"https://doi.org/10.1109/tvlsi.2022.3220339","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3220339","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-b","cwts-core","dongbi-c","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084427876","display_name":"Eunbin Park","orcid":"https://orcid.org/0000-0003-1380-7076","observed_orcids":["https://orcid.org/0000-0003-1380-7076"]},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Eunbin Park","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, South Korea"],"raw_orcid":"https://orcid.org/0000-0003-1380-7076","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032455044","display_name":"Taigon Song","orcid":"https://orcid.org/0000-0001-5243-4132","observed_orcids":["https://orcid.org/0000-0001-5243-4132"]},"institutions":[{"id":"https://openalex.org/I31419693","display_name":"Kyungpook National University","ror":"https://ror.org/040c17130","country_code":"KR","type":"education","lineage":["https://openalex.org/I31419693"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taigon Song","raw_affiliation_strings":["School of Electronics Engineering, Kyungpook National University (KNU), Daegu, South Korea"],"raw_orcid":"https://orcid.org/0000-0001-5243-4132","affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Kyungpook National University (KNU), Daegu, South Korea","institution_ids":["https://openalex.org/I31419693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2195,"currency":"USD","value_usd":2195},"apc_paid":null,"fwci":2.5858,"has_fulltext":false,"cited_by_count":54,"citation_normalized_percentile":{"value":0.90664579,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":100},"biblio":{"volume":"31","issue":"2","first_page":"177","last_page":"187"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.7235999703407288,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.7235999703407288,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.15299999713897705,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.10379999876022339,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/complementary-field-effect-transistors","display_name":"CFET","score":0.9120000004768372},{"id":"https://openalex.org/keywords/parasitic-effects","display_name":"parasitic effects","score":0.5329999923706055},{"id":"https://openalex.org/keywords/3-nm-technology-node","display_name":"3 nm technology node","score":0.7749999761581421},{"id":"https://openalex.org/keywords/nanosheet-fet","display_name":"nanosheet FET","score":0.8320000171661377},{"id":"https://openalex.org/keywords/energy-consumption-reduction","display_name":"energy consumption reduction","score":0.699999988079071},{"id":"https://openalex.org/keywords/wirelength-minimization","display_name":"wirelength minimization","score":0.6660000085830688},{"id":"https://openalex.org/keywords/reduction-of-area","display_name":"area reduction","score":0.5569999814033508},{"id":"https://openalex.org/keywords/design-flow","display_name":"design flow","score":0.42800000309944153}],"concepts":[{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.8971834182739258},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6794593930244446},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.6469495892524719},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5732230544090271},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5567867755889893},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5464048981666565},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5388185381889343},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5116987228393555},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.46869349479675293},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.42720651626586914},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4148057997226715},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3393089771270752},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2754305601119995},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12662452459335327},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3220339","doi":"https://doi.org/10.1109/tvlsi.2022.3220339","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3220339","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-b","cwts-core","dongbi-c","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[{"id":"https://openalex.org/G8226453395","display_name":null,"funder_award_id":"2020M3H2A1078045","funder_id":"https://openalex.org/F4320322030","funder_display_name":"Ministry of Science, ICT and Future Planning"}],"funders":[{"id":"https://openalex.org/F4320322030","display_name":"Ministry of Science, ICT and Future Planning","ror":"https://ror.org/032e49973"},{"id":"https://openalex.org/F4320322120","display_name":"National Research Foundation of Korea","ror":"https://ror.org/013aysd81"},{"id":"https://openalex.org/F4320322202","display_name":"IC Design Education Center","ror":"https://ror.org/005v57z85"},{"id":"https://openalex.org/F4320332195","display_name":"Samsung","ror":"https://ror.org/04w3jy968"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W2000567517","https://openalex.org/W2081165930","https://openalex.org/W2168493680","https://openalex.org/W2169652762","https://openalex.org/W2280078304","https://openalex.org/W2281209855","https://openalex.org/W2407281061","https://openalex.org/W2577052829","https://openalex.org/W2587700568","https://openalex.org/W2620886405","https://openalex.org/W2687730634","https://openalex.org/W2775419770","https://openalex.org/W2790671107","https://openalex.org/W2887240872","https://openalex.org/W2887386430","https://openalex.org/W2887585658","https://openalex.org/W2899004836","https://openalex.org/W2913404074","https://openalex.org/W2922326057","https://openalex.org/W2941642691","https://openalex.org/W2944442872","https://openalex.org/W2949151127","https://openalex.org/W2965234963","https://openalex.org/W3006265545","https://openalex.org/W3006604617","https://openalex.org/W3095098915","https://openalex.org/W3096466258","https://openalex.org/W3098364797","https://openalex.org/W3098717236","https://openalex.org/W3102668149","https://openalex.org/W3143696222","https://openalex.org/W3157234868","https://openalex.org/W3163248746","https://openalex.org/W3195385943","https://openalex.org/W3216758177","https://openalex.org/W7065087130"],"related_works":["https://openalex.org/W3215101624","https://openalex.org/W3095098915","https://openalex.org/W4280530228","https://openalex.org/W4210796296","https://openalex.org/W2965234963","https://openalex.org/W4416825151","https://openalex.org/W7213256841","https://openalex.org/W4404133312","https://openalex.org/W4399027149","https://openalex.org/W2922326057"],"abstract_inverted_index":{"Complementary":[0],"field-effect":[1],"transistor":[2,7],"(CFET)":[3],"is":[4,45],"a":[5,10,115],"future":[6,23],"type":[8],"with":[9],"high":[11,22],"potential":[12],"to":[13,27,105],"be":[14,62],"used":[15],"beyond":[16],"3-nm":[17],"technology":[18],"nodes.":[19],"Despite":[20],"its":[21],"value,":[24],"studies":[25],"related":[26],"CFETs":[28],"mostly":[29],"focused":[30],"on":[31,64,77,109],"the":[32,38,79,90,110,118,130],"device":[33,67],"aspects.":[34],"In":[35,86],"other":[36],"words,":[37],"path":[39],"of":[40,66,92,97,117,132],"CFET":[41,98,113],"full-chip":[42,70,83,111],"IC":[43,84],"design":[44,52,59,99],"not":[46],"fully":[47],"demystified,":[48],"knowing":[49],"that":[50],"various":[51,95],"factors/steps":[53,81],"(such":[54],"as":[55],"schematic,":[56],"layout,":[57],"parasitics,":[58],"flow)":[60],"must":[61],"considered":[63],"top":[65],"traits":[68],"for":[69,82],"level":[71],"IC.":[72],"Therefore,":[73],"this":[74],"study":[75],"focuses":[76],"enlightening":[78],"remaining":[80],"design.":[85],"detail,":[87],"we":[88],"notify":[89],"importance":[91],"parasitics":[93],"from":[94],"aspects":[96],"and":[100,129],"provide":[101],"optimization":[102],"solutions.":[103],"Compared":[104],"nanosheet":[106],"FET":[107],"(NSFET)":[108],"scale,":[112],"shows":[114],"reduction":[116],"area":[119],"by":[120,123,127,134],"\u221248.2%,":[121],"power":[122],"\u221229.4%,":[124],"total":[125],"wirelength":[126],"\u221232.5%,":[128],"number":[131],"cells":[133],"\u221218.1%.":[135]},"counts_by_year":[{"year":2026,"cited_by_count":16},{"year":2025,"cited_by_count":24},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":7}],"updated_date":"2026-11-10T11:39:43.021295","created_date":"2023-01-05T00:00:00"}