{"id":"https://openalex.org/W4312445232","doi":"https://doi.org/10.1109/iscas48785.2022.9937841","title":"A Hybrid Memristor/CMOS SNN for Implementing One-Shot Winner-Takes-All Training","display_name":"A Hybrid Memristor/CMOS SNN for Implementing One-Shot Winner-Takes-All Training","publication_year":2022,"publication_date":"2022-05-28","ids":{"openalex":"https://openalex.org/W4312445232","doi":"https://doi.org/10.1109/iscas48785.2022.9937841"},"language":"en","primary_location":{"id":"doi:10.1109/iscas48785.2022.9937841","doi":"https://doi.org/10.1109/iscas48785.2022.9937841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937841","pdf_url":null,"source":{"id":"https://openalex.org/S4393914142","display_name":"IEEE International Symposium on Circuits and Systems proceedings","issn_l":"0271-4302","issn":["0271-4302"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007956016","display_name":"Javad Ahmadi-Farsani","orcid":"https://orcid.org/0000-0001-6601-7620","observed_orcids":["https://orcid.org/0000-0001-6601-7620"]},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Javad Ahmadi-Farsani","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Saverio Ricci","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Saverio Ricci","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000848957","display_name":"Shahin Hashemkhani","orcid":"https://orcid.org/0000-0003-3629-6424","observed_orcids":["https://orcid.org/0000-0003-3629-6424"]},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Shahin Hashemkhani","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054173368","display_name":"Daniele Ielmini","orcid":"https://orcid.org/0000-0002-1853-1614","observed_orcids":["https://orcid.org/0000-0002-1853-1614"]},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Daniele Ielmini","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla, CSIC/Universidad de Sevilla,Sevilla,Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025922642","display_name":"B. Linares-Barranco","orcid":"https://orcid.org/0000-0002-1813-4889","observed_orcids":["https://orcid.org/0000-0002-1813-4889"]},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Bernabe Linares-Barranco","raw_affiliation_strings":["Politecnico di Milano, Dip. Elettronica, Informazione e Bioingegneria, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Dip. Elettronica, Informazione e Bioingegneria, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079540787","display_name":"Teresa Serrano\u2010Gotarredona","orcid":"https://orcid.org/0000-0001-5714-2526","observed_orcids":["https://orcid.org/0000-0001-5714-2526"]},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Teresa Serrano-Gotarredona","raw_affiliation_strings":["Politecnico di Milano, Dip. Elettronica, Informazione e Bioingegneria, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Dip. Elettronica, Informazione e Bioingegneria, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3923,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.505639,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"210","last_page":"214"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spiking-neural-networks","display_name":"spiking neural networks","score":0.8709999918937683},{"id":"https://openalex.org/keywords/memristors","display_name":"memristors","score":0.8970000147819519},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"resistive random access memory","score":0.8849999904632568},{"id":"https://openalex.org/keywords/hafnium-oxide","display_name":"hafnium oxide","score":0.7379999756813049},{"id":"https://openalex.org/keywords/cmos-integration","display_name":"CMOS integration","score":0.640999972820282},{"id":"https://openalex.org/keywords/pattern-recognition","display_name":"pattern recognition","score":0.6330000162124634},{"id":"https://openalex.org/keywords/neuromorphic-hardware","display_name":"neuromorphic hardware","score":0.7730000019073486},{"id":"https://openalex.org/keywords/0-18-mum-cmos","display_name":"0.18 \u03bcm CMOS","score":0.7229999899864197}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.7553660273551941},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.7023698091506958},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.685748279094696},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6446820497512817},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6421267986297607},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.580115795135498},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.4760051667690277},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4191398620605469},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.37951648235321045},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3658287525177002},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3542459011077881},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.29360777139663696},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.25086528062820435},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16576924920082092},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09847983717918396}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscas48785.2022.9937841","doi":"https://doi.org/10.1109/iscas48785.2022.9937841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas48785.2022.9937841","pdf_url":null,"source":{"id":"https://openalex.org/S4393914142","display_name":"IEEE International Symposium on Circuits and Systems proceedings","issn_l":"0271-4302","issn":["0271-4302"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":["jufo-1","norway-1"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:re.public.polimi.it:11311/1227859","doi":null,"is_oa":false,"landing_page_url":"https://hdl.handle.net/11311/1227859","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320324211","display_name":"Ministry of Economy","ror":"https://ror.org/02fn8ac40"},{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1975398991","https://openalex.org/W2018240811","https://openalex.org/W2051736202","https://openalex.org/W2129788035","https://openalex.org/W2152323008","https://openalex.org/W2154326304","https://openalex.org/W2156640153","https://openalex.org/W2525649597","https://openalex.org/W2532666972","https://openalex.org/W2883593518","https://openalex.org/W2890584292","https://openalex.org/W3003821665","https://openalex.org/W3080915835","https://openalex.org/W3113676811","https://openalex.org/W6663196874"],"related_works":["https://openalex.org/W2922250692","https://openalex.org/W4281957867","https://openalex.org/W3170095321","https://openalex.org/W4367663259","https://openalex.org/W4416675399","https://openalex.org/W4413877513","https://openalex.org/W2056311930","https://openalex.org/W4322627188","https://openalex.org/W4416258991","https://openalex.org/W2114601852"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,25,41,47,101,106],"spiking":[4],"neural":[5],"network":[6,11,109],"for":[7],"pattern":[8],"recognition.":[9],"The":[10,56,73],"synapses":[12],"are":[13,24,31],"realized":[14],"by":[15],"resistive":[16],"switching":[17],"random":[18],"access":[19],"memory":[20],"(ReRAM)":[21],"cells,":[22],"which":[23],"stack":[26],"of":[27,36],"Au/Ti/C/Ti/HfO2/Pt.":[28],"These":[29],"cells":[30],"connected":[32],"to":[33,45,62,69,85,88,116],"an":[34],"array":[35],"NMOS":[37],"transistors":[38],"(fabricated":[39],"in":[40,100,121],"CMOS":[42,102],"180nm":[43,103],"technology)":[44],"form":[46],"4by4":[48],"1T1R":[49],"crossbar":[50],"between":[51],"pre":[52],"and":[53],"postsynaptic":[54],"circuitries.":[55],"pre-synaptic":[57],"part":[58],"contains":[59],"conditioning":[60],"circuits":[61,98],"reshape":[63],"the":[64,70,81,108],"inputs":[65],"before":[66],"applying":[67],"them":[68],"memristive":[71],"crossbar.":[72],"post-synaptic":[74],"section":[75],"includes":[76],"current":[77],"attenuators":[78],"that":[79],"allowed":[80],"memristor":[82],"domain":[83,90],"currents":[84],"be":[86],"mapped":[87],"neuron":[89,97],"currents,":[91],"as":[92,94],"well":[93],"physiologically":[95],"realistic":[96],"fabricated":[99],"technology.":[104],"As":[105],"demonstrator,":[107],"is":[110],"trained":[111],"with":[112],"one-shot":[113],"winner-takes-all":[114],"method":[115],"differentiate":[117],"four":[118],"input":[119],"patterns":[120],"its":[122],"inference":[123],"mode.":[124]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2023-01-04T00:00:00"}
