{"id":"https://openalex.org/W4283206429","doi":"https://doi.org/10.1016/j.matpr.2022.06.174","title":"Efficient designs of high-speed combinational circuits and optimal solutions using 45-degree cell orientation in QCA nanotechnology","display_name":"Efficient designs of high-speed combinational circuits and optimal solutions using 45-degree cell orientation in QCA nanotechnology","publication_year":2022,"publication_date":"2022-01-01","ids":{"openalex":"https://openalex.org/W4283206429","doi":"https://doi.org/10.1016/j.matpr.2022.06.174"},"language":"en","primary_location":{"id":"doi:10.1016/j.matpr.2022.06.174","doi":"https://doi.org/10.1016/j.matpr.2022.06.174","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.matpr.2022.06.174","pdf_url":null,"source":{"id":"https://openalex.org/S2898407351","display_name":"Materials Today Proceedings","issn_l":"2214-7853","issn":["2214-7853"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Materials Today: Proceedings","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Arpita Tiwari","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Arpita Tiwari","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Indore Institute of Science and Technology, Indore, Madhya Pradesh 452001, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Indore Institute of Science and Technology, Indore, Madhya Pradesh 452001, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027582431","display_name":"Mukesh Patidar","orcid":"https://orcid.org/0000-0002-4401-8777","observed_orcids":["https://orcid.org/0000-0002-4401-8777"]},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Mukesh Patidar","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Indore Institute of Science and Technology, Indore, Madhya Pradesh 452001, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Indore Institute of Science and Technology, Indore, Madhya Pradesh 452001, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100733111","display_name":"Ankit Jain","orcid":"https://orcid.org/0000-0001-9498-380X","observed_orcids":["https://orcid.org/0000-0001-9498-380X"]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ankit Jain","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Indore Institute of Science and Technology, Indore, Madhya Pradesh 452001, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Indore Institute of Science and Technology, Indore, Madhya Pradesh 452001, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044544351","display_name":"Nilesh Patidar","orcid":"https://orcid.org/0000-0001-8712-5938","observed_orcids":["https://orcid.org/0000-0001-8712-5938"]},"institutions":[{"id":"https://openalex.org/I4405260892","display_name":"Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore","ror":"https://ror.org/04e9avw37","country_code":"IN","type":"education","lineage":["https://openalex.org/I4405260892"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nilesh Patidar","raw_affiliation_strings":["Department of Electronics Engineering, Shri Vaishnav Institute of Technology and Science, Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore, Madhya Pradesh 452001, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, Shri Vaishnav Institute of Technology and Science, Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore, Madhya Pradesh 452001, India","institution_ids":["https://openalex.org/I4405260892"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057902980","display_name":"Namit Gupta","orcid":"https://orcid.org/0000-0001-6764-8467","observed_orcids":["https://orcid.org/0000-0001-6764-8467"]},"institutions":[{"id":"https://openalex.org/I4405260892","display_name":"Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore","ror":"https://ror.org/04e9avw37","country_code":"IN","type":"education","lineage":["https://openalex.org/I4405260892"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Namit Gupta","raw_affiliation_strings":["Department of Electronics Engineering, Shri Vaishnav Institute of Technology and Science, Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore, Madhya Pradesh 452001, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, Shri Vaishnav Institute of Technology and Science, Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore, Madhya Pradesh 452001, India","institution_ids":["https://openalex.org/I4405260892"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5027582431"],"corresponding_institution_ids":[],"apc_list":{"value":190,"currency":"USD","value_usd":190},"apc_paid":null,"fwci":2.5198,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.89945632,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":99},"biblio":{"volume":"66","issue":null,"first_page":"3465","last_page":"3473"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12029","display_name":"DNA and Biological Computing","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2614","display_name":"Theoretical Computer Science"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/quantum-dot-cellular-automata","display_name":"quantum-dot cellular automata","score":0.9990000128746033},{"id":"https://openalex.org/keywords/nanoscale-logic-circuits","display_name":"nanoscale logic circuits","score":0.6480000019073486},{"id":"https://openalex.org/keywords/adders","display_name":"adders","score":0.6290000081062317},{"id":"https://openalex.org/keywords/subtractor","display_name":"subtractor","score":0.9980000257492065},{"id":"https://openalex.org/keywords/1-bit-comparator","display_name":"1-bit comparator","score":0.9950000047683716},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"propagation delay","score":0.8659999966621399},{"id":"https://openalex.org/keywords/circuit-area-reduction","display_name":"circuit area reduction","score":0.7260000109672546},{"id":"https://openalex.org/keywords/cmos-replacement","display_name":"CMOS replacement","score":0.5260000228881836},{"id":"https://openalex.org/keywords/high-speed-digital-circuits","display_name":"high-speed digital circuits","score":0.6159999966621399}],"concepts":[{"id":"https://openalex.org/C187805909","wikidata":"https://www.wikidata.org/wiki/Q1142401","display_name":"Subtractor","level":4,"score":0.7834939956665039},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.7610175013542175},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6371440887451172},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6081793904304504},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5768397450447083},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.5736275315284729},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5212728977203369},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4826705753803253},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4564833641052246},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.41139811277389526},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2031274139881134},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1725550889968872},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11512500047683716}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/j.matpr.2022.06.174","doi":"https://doi.org/10.1016/j.matpr.2022.06.174","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.matpr.2022.06.174","pdf_url":null,"source":{"id":"https://openalex.org/S2898407351","display_name":"Materials Today Proceedings","issn_l":"2214-7853","issn":["2214-7853"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","norway-1"],"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Materials Today: Proceedings","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1993195971","https://openalex.org/W1999347979","https://openalex.org/W2059030116","https://openalex.org/W2133403974","https://openalex.org/W2461138049","https://openalex.org/W2522528128","https://openalex.org/W2567551601","https://openalex.org/W2750737335","https://openalex.org/W2770524784","https://openalex.org/W2782434590","https://openalex.org/W2808423039","https://openalex.org/W2886224365","https://openalex.org/W2909024809","https://openalex.org/W3006138984","https://openalex.org/W3028648677","https://openalex.org/W3096442323","https://openalex.org/W3118857760","https://openalex.org/W3159025373","https://openalex.org/W3195015647","https://openalex.org/W3197114213","https://openalex.org/W3209320460","https://openalex.org/W4200328023","https://openalex.org/W4226145318","https://openalex.org/W4242743569","https://openalex.org/W4250213158","https://openalex.org/W6753000045","https://openalex.org/W6784663073"],"related_works":["https://openalex.org/W4415266646","https://openalex.org/W4401877271","https://openalex.org/W4221043510","https://openalex.org/W3033199538","https://openalex.org/W2096738483","https://openalex.org/W4283831819","https://openalex.org/W3097000804","https://openalex.org/W4296834292","https://openalex.org/W4361222293","https://openalex.org/W4247857976"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1}],"updated_date":"2026-11-10T11:39:43.021295","created_date":"2022-06-22T00:00:00"}