{"id":"https://openalex.org/W4253828016","doi":"https://doi.org/10.1109/dac.1984.1585872","title":"An Algorithm for Finding a Rectangular Dual of a Planar Graph for Use in Area Planning for VLSI Integrated Circuits","display_name":"An Algorithm for Finding a Rectangular Dual of a Planar Graph for Use in Area Planning for VLSI Integrated Circuits","publication_year":1984,"publication_date":"1984-01-01","ids":{"openalex":"https://openalex.org/W4253828016","doi":"https://doi.org/10.1109/dac.1984.1585872","mag":"2023112489"},"language":"en","primary_location":{"id":"doi:10.1109/dac.1984.1585872","doi":"https://doi.org/10.1109/dac.1984.1585872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac.1984.1585872","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"ACM/IEEE Design Automation Conference (DAC)","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"21st Design Automation Conference Proceedings","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073020485","display_name":"Krzysztof Ko\u017ami\u0144ski","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Kozminski","raw_affiliation_strings":["Department of Electrical Engineering, University of Rochester, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009081587","display_name":"E. Kinnen","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E. Kinnen","raw_affiliation_strings":["Department of Electrical Engineering, University of Rochester, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5388228"],"apc_list":null,"apc_paid":null,"fwci":12.7905,"has_fulltext":false,"cited_by_count":85,"citation_normalized_percentile":{"value":0.99527909,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":88,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"655","last_page":"656"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9868000149726868,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9868000149726868,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10720","display_name":"Complexity and Algorithms in Graphs","score":0.005200000014156103,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10996","display_name":"Computational Geometry and Mesh Generation","score":0.003800000064074993,"subfield":{"id":"https://openalex.org/subfields/1704","display_name":"Computer Graphics and Computer-Aided Design"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/planar-graph-embedding","display_name":"planar embedding","score":0.6480000019073486},{"id":"https://openalex.org/keywords/area-planning","display_name":"area planning","score":0.843999981880188},{"id":"https://openalex.org/keywords/o-n-2-algorithm","display_name":"O(n^2) algorithm","score":0.7889999747276306},{"id":"https://openalex.org/keywords/graph-layout","display_name":"graph layout","score":0.3190000057220459}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.885344922542572},{"id":"https://openalex.org/C169827030","wikidata":"https://www.wikidata.org/wiki/Q2294516","display_name":"Dual graph","level":4,"score":0.7744195461273193},{"id":"https://openalex.org/C134786449","wikidata":"https://www.wikidata.org/wiki/Q3391255","display_name":"Planar","level":2,"score":0.7148557305335999},{"id":"https://openalex.org/C101837359","wikidata":"https://www.wikidata.org/wiki/Q547823","display_name":"Planar graph","level":3,"score":0.6530473828315735},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6371462941169739},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.5890542268753052},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.550740659236908},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5458956956863403},{"id":"https://openalex.org/C131930043","wikidata":"https://www.wikidata.org/wiki/Q7200964","display_name":"Planar straight-line graph","level":5,"score":0.4606281816959381},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.44309699535369873},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.26468101143836975},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14103978872299194},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1260133683681488},{"id":"https://openalex.org/C203776342","wikidata":"https://www.wikidata.org/wiki/Q1378376","display_name":"Line graph","level":3,"score":0.09282243251800537},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.07957279682159424},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.06835943460464478},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C43517604","wikidata":"https://www.wikidata.org/wiki/Q7144893","display_name":"Pathwidth","level":4,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dac.1984.1585872","doi":"https://doi.org/10.1109/dac.1984.1585872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac.1984.1585872","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"ACM/IEEE Design Automation Conference (DAC)","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"21st Design Automation Conference Proceedings","raw_type":"proceedings-article"},{"id":"mag:2023112489","doi":null,"is_oa":false,"landing_page_url":"https://dblp.uni-trier.de/db/conf/dac/dac1984.html#KozminskiK84","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"ACM/IEEE Design Automation Conference (DAC)","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"Design Automation Conference","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1986679986","https://openalex.org/W2018046116","https://openalex.org/W2092020648"],"related_works":["https://openalex.org/W4255140145","https://openalex.org/W2049915634","https://openalex.org/W4239825409","https://openalex.org/W1925332412","https://openalex.org/W1499103390","https://openalex.org/W2258137650","https://openalex.org/W2052195832","https://openalex.org/W2121666768","https://openalex.org/W2041379189","https://openalex.org/W2082861933"],"abstract_inverted_index":{"An":[0],"O(n":[1],"/sup":[2],"2/)":[3],"algorithm":[4,27],"for":[5,30],"finding":[6],"a":[7,11],"rectangular":[8],"dual":[9],"of":[10],"planar":[12],"triangulated":[13],"graph":[14],"is":[15,28],"presented.":[16],"In":[17],"practice,":[18],"almost":[19],"linear":[20],"running":[21],"times":[22],"have":[23],"been":[24],"observed.":[25],"The":[26],"useful":[29],"solving":[31],"area":[32],"planning":[33],"problems":[34],"in":[35],"VLSI":[36],"IC":[37],"design.":[38]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":2}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2022-05-12T00:00:00"}
