{"id":"https://openalex.org/W4253735690","doi":"https://doi.org/10.1049/sm.1984.0002","title":"Program debugging and performance evaluation aids for a multi-microprocessor development system","display_name":"Program debugging and performance evaluation aids for a multi-microprocessor development system","publication_year":1984,"publication_date":"1984-01-01","ids":{"openalex":"https://openalex.org/W4253735690","doi":"https://doi.org/10.1049/sm.1984.0002","mag":"1988238429"},"language":"en","primary_location":{"id":"doi:10.1049/sm.1984.0002","doi":"https://doi.org/10.1049/sm.1984.0002","is_oa":false,"landing_page_url":"https://doi.org/10.1049/sm.1984.0002","pdf_url":null,"source":{"id":"https://openalex.org/S9652442","display_name":"Software & Microsystems","issn_l":"0261-3182","issn":["0261-3182","2053-9096"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Software &amp; Microsystems","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003909744","display_name":"J.E. Lambert","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I162608824","display_name":"University of Sussex","ror":"https://ror.org/00ayhx656","country_code":"GB","type":"education","lineage":["https://openalex.org/I162608824"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"J.E. Lambert","raw_affiliation_strings":["School of Engineering & Applied Sciences, University of Sussex, Brighton, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Engineering & Applied Sciences, University of Sussex, Brighton, UK","institution_ids":["https://openalex.org/I162608824"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062021463","display_name":"Fred Halsall","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I162608824","display_name":"University of Sussex","ror":"https://ror.org/00ayhx656","country_code":"GB","type":"education","lineage":["https://openalex.org/I162608824"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"F. Halsall","raw_affiliation_strings":["School of Engineering & Applied Sciences, University of Sussex, Brighton, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Engineering & Applied Sciences, University of Sussex, Brighton, UK","institution_ids":["https://openalex.org/I162608824"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I162608824"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":"3","issue":"1","first_page":"2","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5131999850273132,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5131999850273132,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.391400009393692,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.06199999898672104,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multi-microprocessor-systems","display_name":"multi-microprocessor systems","score":0.9419999718666077},{"id":"https://openalex.org/keywords/debugging","display_name":"debugging","score":0.6759999990463257},{"id":"https://openalex.org/keywords/performance-evaluation","display_name":"performance evaluation","score":0.8339999914169312},{"id":"https://openalex.org/keywords/real-time-embedded-systems","display_name":"real-time embedded systems","score":0.9049999713897705},{"id":"https://openalex.org/keywords/software-development-tools","display_name":"software development tools","score":0.9309999942779541}],"concepts":[{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.8564169406890869},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.7957711219787598},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6772928833961487},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5889073610305786},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.5793255567550659},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.5013542175292969},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.47681185603141785},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4763760268688202},{"id":"https://openalex.org/C2776542497","wikidata":"https://www.wikidata.org/wiki/Q5266672","display_name":"Development (topology)","level":2,"score":0.4672740697860718},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.41111665964126587},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40186384320259094},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.32790765166282654},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.173256516456604},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1049/sm.1984.0002","doi":"https://doi.org/10.1049/sm.1984.0002","is_oa":false,"landing_page_url":"https://doi.org/10.1049/sm.1984.0002","pdf_url":null,"source":{"id":"https://openalex.org/S9652442","display_name":"Software & Microsystems","issn_l":"0261-3182","issn":["0261-3182","2053-9096"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Software &amp; Microsystems","raw_type":"journal-article"},{"id":"mag:1988238429","doi":null,"is_oa":false,"landing_page_url":"https://dblp.uni-trier.de/db/journals/iee-sej/iee-sm3.html#LambertH84","pdf_url":null,"source":{"id":"https://openalex.org/S9652442","display_name":"Software & Microsystems","issn_l":"0261-3182","issn":["0261-3182","2053-9096"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"Software & Microsystems","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W178258208"],"related_works":["https://openalex.org/W2069146665","https://openalex.org/W4242297292","https://openalex.org/W818893253","https://openalex.org/W2078675076","https://openalex.org/W7027901096","https://openalex.org/W2072806664","https://openalex.org/W2057452768","https://openalex.org/W4232656008","https://openalex.org/W71579712","https://openalex.org/W2080519303"],"abstract_inverted_index":{"The":[0],"paper":[1],"describes":[2],"a":[3,17,29],"range":[4],"of":[5,31,45,66],"software":[6,53],"development":[7,19,58],"facilities":[8,46],"which":[9],"have":[10],"been":[11],"implemented":[12],"by":[13],"the":[14,52,64],"authors":[15],"for":[16,56,62],"multi-microprocessor":[18,41],"system.":[20],"This":[21],"system":[22],"is":[23],"currently":[24],"being":[25],"used":[26],"to":[27],"investigate":[28],"variety":[30],"problem":[32],"areas":[33],"associated":[34],"with":[35],"implementing":[36],"real-time":[37],"embedded":[38],"systems":[39],"using":[40],"techniques.":[42],"A":[43],"number":[44],"are":[47],"described":[48],"including":[49],"not":[50],"only":[51],"tools":[54],"necessary":[55],"program":[57],"but":[59],"also":[60],"those":[61],"evaluating":[63],"performance":[65],"operational":[67],"systems.":[68]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-10-12T09:40:04.860316","created_date":"2022-05-12T00:00:00"}
