{"id":"https://openalex.org/W4253376644","doi":"https://doi.org/10.1109/dsd.2004.1333321","title":"Towards new real-time processor: the multioperand MSB-first real-time adder","display_name":"Towards new real-time processor: the multioperand MSB-first real-time adder","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W4253376644","doi":"https://doi.org/10.1109/dsd.2004.1333321"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2004.1333321","doi":"https://doi.org/10.1109/dsd.2004.1333321","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2004.1333321","pdf_url":null,"source":{"id":"https://openalex.org/S4363608375","display_name":"Euromicro Conference on Digital System Design (DSD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2004. DSD 2004.","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063780760","display_name":"Kuspriyanto","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I134635517","display_name":"Bandung Institute of Technology","ror":"https://ror.org/00apj8t60","country_code":"ID","type":"education","lineage":["https://openalex.org/I134635517"]}],"countries":["ID"],"is_corresponding":false,"raw_author_name":"Kuspriyanto","raw_affiliation_strings":["Laboratory of Computer and Control System, Department of Electrical Engineering, Bandung Institute of Technology, Indonesia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory of Computer and Control System, Department of Electrical Engineering, Bandung Institute of Technology, Indonesia","institution_ids":["https://openalex.org/I134635517"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111972534","display_name":"Yusrila Yeka Kerlooza","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210117444","display_name":"Universitas Komputer Indonesia","ror":"https://ror.org/02j652854","country_code":"ID","type":"education","lineage":["https://openalex.org/I4210117444"]}],"countries":["ID"],"is_corresponding":false,"raw_author_name":"Y.Y. Kerlooza","raw_affiliation_strings":["Hardware Laboratory, Department of Computer Engineering, Indonesian Computer University, Indonesia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hardware Laboratory, Department of Computer Engineering, Indonesian Computer University, Indonesia","institution_ids":["https://openalex.org/I4210117444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2008,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.46442846,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"524","last_page":"529"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.49459999799728394,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.49459999799728394,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.2168000042438507,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.19509999454021454,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/real-time-systems","display_name":"real-time systems","score":0.8199999928474426},{"id":"https://openalex.org/keywords/deadline-constraints","display_name":"deadline constraints","score":0.6830000281333923},{"id":"https://openalex.org/keywords/intermediate-outcomes","display_name":"intermediate outcomes","score":0.5709999799728394},{"id":"https://openalex.org/keywords/max-plus-ii","display_name":"MAX+Plus II","score":0.6110000014305115}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8075482845306396},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6154733896255493},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5936148166656494},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5084442496299744},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5057098865509033},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.44947168231010437},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42751505970954895},{"id":"https://openalex.org/C34388435","wikidata":"https://www.wikidata.org/wiki/Q2267362","display_name":"Bounded function","level":2,"score":0.41346630454063416},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.37759044766426086},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3506302535533905},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3237595856189728},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1355704665184021},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0935157835483551},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07735282182693481},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dsd.2004.1333321","doi":"https://doi.org/10.1109/dsd.2004.1333321","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2004.1333321","pdf_url":null,"source":{"id":"https://openalex.org/S4363608375","display_name":"Euromicro Conference on Digital System Design (DSD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2004. DSD 2004.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W1581210787","https://openalex.org/W2170708759"],"related_works":["https://openalex.org/W2267669344","https://openalex.org/W3147669815","https://openalex.org/W2030688804","https://openalex.org/W7097384774","https://openalex.org/W2005076431","https://openalex.org/W2291195357","https://openalex.org/W2598867149","https://openalex.org/W2767007111","https://openalex.org/W2003568883","https://openalex.org/W145322937"],"abstract_inverted_index":{"Arithmetic":[0],"operation's":[1],"execution":[2],"time":[3,33],"in":[4,116,128],"real-time":[5,89],"system":[6],"is":[7,19,37,50,119,141],"bounded":[8],"by":[9,20,53],"deadlines.":[10],"The":[11],"method":[12],"commonly":[13,60],"used":[14,61,115],"to":[15,35,70,77],"meet":[16],"these":[17],"deadlines":[18],"employing":[21],"any":[22],"suitable":[23],"process-scheduling":[24],"algorithm,":[25],"which":[26,91,140],"may":[27],"contain":[28],"a":[29],"potential":[30],"weakness.":[31],"If":[32],"needed":[34],"operate":[36],"longer":[38],"than":[39,143],"its":[40,82,93,103,137],"deadline,":[41],"then":[42],"the":[43,54,57,66,97,111,130,133,144,147],"result's":[44],"quality":[45],"will":[46],"be":[47,71,107],"poor.":[48],"This":[49,74,125],"mainly":[51],"caused":[52],"algorithms":[55],"of":[56,132,146],"arithmetic":[58],"operations":[59],"nowadays":[62],"do":[63],"not":[64],"choose":[65],"most":[67],"significant":[68],"data":[69],"processed":[72],"first.":[73],"research":[75,118,126],"tries":[76],"design":[78],"new":[79,134],"algorithm":[80,135],"and":[81,101,136],"processing":[83,138],"unit":[84],"that":[85,105],"works":[86],"based":[87],"on":[88],"principles,":[90],"starts":[92],"computation":[94],"process":[95],"from":[96],"highest":[98],"valued":[99],"digit":[100],"provides":[102],"intermediate-results":[104],"can":[106],"accessed":[108],"anytime":[109],"during":[110],"process.":[112],"Designing":[113],"tool":[114],"this":[117],"MAX+plus":[120],"II":[121],"Baseline":[122],"10.2":[123],"software.":[124],"accomplishes":[127],"showing":[129],"performance":[131,145],"unit,":[139],"better":[142],"conventional":[148],"algorithm.":[149]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-10-27T15:51:10.671819","created_date":"2022-05-12T00:00:00"}