{"id":"https://openalex.org/W4250173597","doi":"https://doi.org/10.1049/ip-e.1984.0039","title":"Microprogrammable sequential controller","display_name":"Microprogrammable sequential controller","publication_year":1984,"publication_date":"1984-01-01","ids":{"openalex":"https://openalex.org/W4250173597","doi":"https://doi.org/10.1049/ip-e.1984.0039","mag":"2030920093"},"language":"en","primary_location":{"id":"doi:10.1049/ip-e.1984.0039","doi":"https://doi.org/10.1049/ip-e.1984.0039","is_oa":false,"landing_page_url":"https://doi.org/10.1049/ip-e.1984.0039","pdf_url":null,"source":{"id":"https://openalex.org/S4210237432","display_name":"IEE Proceedings E Computers and Digital Techniques","issn_l":"0143-7062","issn":["0143-7062","2053-7948"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEE Proceedings E Computers and Digital Techniques","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061268620","display_name":"D.M. Divan","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"D.M. Divan","raw_affiliation_strings":["Department of Electrical Engineering, University of Calgary, Calgary, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Calgary, Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051456929","display_name":"G.C. Hancock","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"G.C. Hancock","raw_affiliation_strings":["Department of Electrical Engineering, University of Calgary, Calgary, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Calgary, Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113695169","display_name":"G.S. Hope","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"G.S. Hope","raw_affiliation_strings":["Department of Electrical Engineering, University of Calgary, Calgary, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Calgary, Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060470396","display_name":"Thomas H. Barton","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"T.H. Barton","raw_affiliation_strings":["Department of Electrical Engineering, University of Calgary, Calgary, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Calgary, Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I168635309"],"apc_list":null,"apc_paid":null,"fwci":0.7812,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.72541945,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"131","issue":"6","first_page":"201","last_page":"201"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.7134000062942505,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.7134000062942505,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13344","display_name":"Industrial Automation and Control Systems","score":0.19359999895095825,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.025800000876188278,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/logic-controllers","display_name":"logic controllers","score":0.7049999833106995},{"id":"https://openalex.org/keywords/parallel-architecture","display_name":"parallel architecture","score":0.6660000085830688},{"id":"https://openalex.org/keywords/memory-segmentation","display_name":"memory segmentation","score":0.9330000281333923},{"id":"https://openalex.org/keywords/firmware-modification","display_name":"firmware modification","score":0.8579999804496765},{"id":"https://openalex.org/keywords/control-architecture","display_name":"control architecture","score":0.5440000295639038},{"id":"https://openalex.org/keywords/memory-efficiency","display_name":"memory efficiency","score":0.6909999847412109}],"concepts":[{"id":"https://openalex.org/C67212190","wikidata":"https://www.wikidata.org/wiki/Q104851","display_name":"Firmware","level":2,"score":0.8411147594451904},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7321559190750122},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.6777886152267456},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5679747462272644},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.5501596927642822},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4930386245250702},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48280584812164307},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4187981188297272},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35470348596572876},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.10990479588508606},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07307600975036621},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1049/ip-e.1984.0039","doi":"https://doi.org/10.1049/ip-e.1984.0039","is_oa":false,"landing_page_url":"https://doi.org/10.1049/ip-e.1984.0039","pdf_url":null,"source":{"id":"https://openalex.org/S4210237432","display_name":"IEE Proceedings E Computers and Digital Techniques","issn_l":"0143-7062","issn":["0143-7062","2053-7948"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEE Proceedings E Computers and Digital Techniques","raw_type":"journal-article"},{"id":"mag:2030920093","doi":null,"is_oa":false,"landing_page_url":"http://ieeexplore.ieee.org/iel5/4641395/4646197/04646198.pdf?arnumber=4646198","pdf_url":null,"source":{"id":"https://openalex.org/S4210237432","display_name":"IEE Proceedings E Computers and Digital Techniques","issn_l":"0143-7062","issn":["0143-7062","2053-7948"],"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false,"raw_source_name":"IEE Proceedings E Computers and Digital Techniques","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320310537","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1496247764","https://openalex.org/W1498123528","https://openalex.org/W1950090947"],"related_works":["https://openalex.org/W840897200","https://openalex.org/W2121852819","https://openalex.org/W2056006243","https://openalex.org/W2039978824","https://openalex.org/W2043946792","https://openalex.org/W2802160118","https://openalex.org/W4237410516","https://openalex.org/W2041529135","https://openalex.org/W270731569","https://openalex.org/W4250189836"],"abstract_inverted_index":{"The":[0,27,62],"architecture":[1],"and":[2,24,36,59,69],"design":[3],"of":[4,29],"a":[5,30,37,66],"high-performance":[6],"general-purpose":[7],"microprogrammable":[8,71],"sequential":[9,32,49,82],"controller":[10,33,50,64],"are":[11,16,34],"presented.":[12],"Conventional":[13],"logic":[14],"controllers":[15,83],"limited":[17],"by":[18],"speed,":[19],"memory":[20,38,60],"requirements":[21,28],"or":[22],"flexibility":[23],"programming":[25],"ease.":[26],"basic":[31],"identified,":[35],"segmentation":[39],"technique":[40],"is":[41,51,56,70,76],"proposed":[42],"for":[43,79],"efficient":[44],"data":[45],"structuring.":[46],"A":[47],"parallel-architecture":[48],"designed":[52,78],"so":[53],"that":[54],"it":[55],"both":[57],"fast":[58],"efficient.":[61],"new":[63],"has":[65],"fixed":[67],"hardware":[68],"through":[72],"firmware":[73],"modification.":[74],"It":[75],"especially":[77],"complex":[80],"high-speed":[81],"requiring":[84],"large":[85],"I/O":[86],"capabilities.":[87]},"counts_by_year":[],"updated_date":"2026-11-03T10:50:19.383937","created_date":"2022-05-12T00:00:00"}
