{"id":"https://openalex.org/W4226442889","doi":"https://doi.org/10.1109/ted.2022.3152978","title":"RRAM Compact Modeling Using Physics and Machine Learning Hybridization","display_name":"RRAM Compact Modeling Using Physics and Machine Learning Hybridization","publication_year":2022,"publication_date":"2022-03-08","ids":{"openalex":"https://openalex.org/W4226442889","doi":"https://doi.org/10.1109/ted.2022.3152978"},"language":"en","primary_location":{"id":"doi:10.1109/ted.2022.3152978","doi":"https://doi.org/10.1109/ted.2022.3152978","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ted.2022.3152978","pdf_url":null,"source":{"id":"https://openalex.org/S162355128","display_name":"IEEE Transactions on Electron Devices","issn_l":"0018-9383","issn":["0018-9383","1557-9646"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-3","norway-2","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Electron Devices","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024992159","display_name":"Albert Shihchun Lin","orcid":"https://orcid.org/0000-0001-6104-3360","observed_orcids":["https://orcid.org/0000-0001-6104-3360"]},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Albert S. Lin","raw_affiliation_strings":["Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0001-6104-3360","affiliations":[{"raw_affiliation_string":"Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086837963","display_name":"Po-Ning Liu","orcid":"https://orcid.org/0000-0003-3135-7099","observed_orcids":["https://orcid.org/0000-0003-3135-7099"]},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Po-Ning Liu","raw_affiliation_strings":["Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0003-3135-7099","affiliations":[{"raw_affiliation_string":"Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064507748","display_name":"Sparsh Pratik","orcid":"https://orcid.org/0000-0002-2927-7121","observed_orcids":["https://orcid.org/0000-0002-2927-7121"]},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Sparsh Pratik","raw_affiliation_strings":["Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-2927-7121","affiliations":[{"raw_affiliation_string":"Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012601105","display_name":"Zheng-Kai Yang","orcid":"https://orcid.org/0000-0001-7116-3403","observed_orcids":["https://orcid.org/0000-0001-7116-3403"]},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Zheng-Kai Yang","raw_affiliation_strings":["Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0001-7116-3403","affiliations":[{"raw_affiliation_string":"Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040582519","display_name":"Tejender Singh Rawat","orcid":"https://orcid.org/0000-0001-7894-0463","observed_orcids":["https://orcid.org/0000-0001-7894-0463"]},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tejender Rawat","raw_affiliation_strings":["Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0001-7894-0463","affiliations":[{"raw_affiliation_string":"Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081838658","display_name":"Tseung\u2010Yuen Tseng","orcid":"https://orcid.org/0000-0003-1158-5289","observed_orcids":["https://orcid.org/0000-0003-1158-5289"]},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tseung-Yuen Tseng","raw_affiliation_strings":["Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan"],"raw_orcid":"https://orcid.org/0000-0003-1158-5289","affiliations":[{"raw_affiliation_string":"Institute of Electronics Engineering, National Yang Ming Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":{"value":2195,"currency":"USD","value_usd":2195},"apc_paid":null,"fwci":0.7493,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.63980776,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":93,"max":97},"biblio":{"volume":"69","issue":"4","first_page":"1835","last_page":"1841"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"resistive random access memory","score":0.9789999723434448},{"id":"https://openalex.org/keywords/compact-modeling","display_name":"compact modeling","score":0.7739999890327454},{"id":"https://openalex.org/keywords/physics-informed-machine-learning","display_name":"physics-informed machine learning","score":0.7540000081062317},{"id":"https://openalex.org/keywords/hybrid-physics-machine-learning-models","display_name":"hybrid physics-machine learning models","score":0.6539999842643738},{"id":"https://openalex.org/keywords/multi-step-forecasting","display_name":"multi-step forecasting","score":0.7599999904632568},{"id":"https://openalex.org/keywords/transient-response","display_name":"transient response","score":0.5590000152587891},{"id":"https://openalex.org/keywords/verilog-a","display_name":"Verilog-A","score":0.609000027179718},{"id":"https://openalex.org/keywords/hspice","display_name":"HSPICE","score":0.8009999990463257},{"id":"https://openalex.org/keywords/device-modeling","display_name":"device modeling","score":0.4359999895095825}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.7897154092788696},{"id":"https://openalex.org/C2779795794","wikidata":"https://www.wikidata.org/wiki/Q7315343","display_name":"Reset (finance)","level":2,"score":0.5932185649871826},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4685652554035187},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4457566738128662},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4311884045600891},{"id":"https://openalex.org/C139945424","wikidata":"https://www.wikidata.org/wiki/Q1940696","display_name":"Mean squared error","level":2,"score":0.4188993573188782},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.366775780916214},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3606724441051483},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23440119624137878},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19783765077590942},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.18273308873176575},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1440313458442688},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ted.2022.3152978","doi":"https://doi.org/10.1109/ted.2022.3152978","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ted.2022.3152978","pdf_url":null,"source":{"id":"https://openalex.org/S162355128","display_name":"IEEE Transactions on Electron Devices","issn_l":"0018-9383","issn":["0018-9383","1557-9646"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-b","jufo-3","norway-2","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Electron Devices","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[{"id":"https://openalex.org/G222227733","display_name":"Smart Manufacturing of Semiconductor Devices in Industry 4.0","funder_award_id":"MOST109-2221-E009-060","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G5162997301","display_name":"Smart Manufacturing of Semiconductor Devices in Industry 4.0 (Ii)","funder_award_id":"MOST110-2221-EA49-143","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W174928017","https://openalex.org/W1502540862","https://openalex.org/W1865332387","https://openalex.org/W1970593755","https://openalex.org/W1979260777","https://openalex.org/W2010160963","https://openalex.org/W2010959282","https://openalex.org/W2027342132","https://openalex.org/W2042262421","https://openalex.org/W2049568033","https://openalex.org/W2051736202","https://openalex.org/W2162279286","https://openalex.org/W2162722529","https://openalex.org/W2167784970","https://openalex.org/W2324577940","https://openalex.org/W2515763243","https://openalex.org/W2530591187","https://openalex.org/W2560467685","https://openalex.org/W2765160642","https://openalex.org/W2783329168","https://openalex.org/W2792297949","https://openalex.org/W2887857283","https://openalex.org/W3113788634","https://openalex.org/W4236126228","https://openalex.org/W4253089598"],"related_works":["https://openalex.org/W4407948770","https://openalex.org/W3113788634","https://openalex.org/W7155531999","https://openalex.org/W4382940963","https://openalex.org/W2769029411","https://openalex.org/W3211744893","https://openalex.org/W1700279758","https://openalex.org/W4400645294","https://openalex.org/W2991418313","https://openalex.org/W2949588176"],"abstract_inverted_index":{"Machine":[0],"learning":[1],"(ML)-based":[2],"compact":[3,197],"model":[4,27,108,175],"(CM)":[5],"provide":[6,50],"an":[7],"alternative":[8],"way":[9,194],"in":[10,53,63,83,115,185,195],"contrast":[11],"to":[12,85,109,172],"physics-based":[13],"CMs.":[14,56,95],"The":[15,72,200],"advantages":[16],"of":[17,89,148],"ML":[18,42,55,64,81,188],"CMs":[19,65],"include":[20],"the":[21,38,45,76,99,106,111,120,126,145,156,160,174,180,191],"process-aware":[22],"capability,":[23],"expandability,":[24],"improved":[25],"behavioral":[26],"for":[28,34,66],"a":[29,60,165],"circuit":[30],"block,":[31],"and":[32,122,137,162,187],"usability":[33],"emerging":[35],"devices.":[36],"On":[37],"other":[39],"hand,":[40],"while":[41],"is":[43,105,135,202],"on":[44,132,164],"rise,":[46],"device":[47,198],"physics":[48,61,186],"can":[49,151],"many":[51],"guidelines":[52],"constructing":[54],"Here,":[57],"we":[58,142],"propose":[59],"architecture":[62,78],"resistive":[67],"random":[68],"access":[69],"memory":[70,92],"(RRAM).":[71],"results":[73],"show":[74],"that":[75,98,144,179],"physics-assisted":[77],"enables":[79],"simpler":[80],"models":[82],"reference":[84],"our":[86],"previous":[87],"work":[88],"long":[90],"short-term":[91],"(LSTM)-based":[93],"RRAM":[94,112],"We":[96,177],"found":[97],"discrete":[100,121],"state":[101,124],"variable":[102],"with":[103,183],"classification":[104],"best":[107],"describe":[110],"set/reset":[113,149],"scenario":[114],"multistep":[116],"prediction":[117],"problems.":[118],"For":[119],"continuous":[123],"variables,":[125],"root":[127],"mean":[128],"square":[129],"error":[130],"(RMSE)":[131],"test":[133],"data":[134],"0.000125":[136],"0.000119,":[138],"respectively.":[139],"In":[140],"addition,":[141],"demonstrate":[143],"transient":[146],"behavior":[147],"changes":[150],"be":[152,190],"easily":[153],"incorporated":[154],"into":[155],"proposed":[157],"model.":[158],"Finally,":[159],"Verilog-A":[161],"HSPICE":[163],"1T1R":[166],"cell":[167],"have":[168],"also":[169],"been":[170],"shown":[171],"prove":[173],"feasibility.":[176],"suggest":[178],"uniform":[181],"framework":[182],"hybridization":[184],"should":[189],"most":[192],"efficient":[193],"future":[196],"modeling.":[199],"code":[201],"available":[203],"athttps://github.com/albertlin11/RRAMunif.":[204]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2}],"updated_date":"2026-10-14T16:39:01.820549","created_date":"2022-05-05T00:00:00"}
