{"id":"https://openalex.org/W32337268","doi":"https://doi.org/10.1007/978-3-642-36812-7_20","title":"Iterative Routing Algorithm of Inter-FPGA Signals for Multi-FPGA Prototyping Platform","display_name":"Iterative Routing Algorithm of Inter-FPGA Signals for Multi-FPGA Prototyping Platform","publication_year":2013,"publication_date":"2013-01-01","ids":{"openalex":"https://openalex.org/W32337268","doi":"https://doi.org/10.1007/978-3-642-36812-7_20","mag":"32337268"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-36812-7_20","doi":"https://doi.org/10.1007/978-3-642-36812-7_20","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-36812-7_20","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","ki-jl-1","norway-1","vabb-shw"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"volume":{"id":"https://openalex.org/W4302604150","display_name":"Reconfigurable Computing: Architectures, Tools and Applications"},"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019168974","display_name":"Mariem Turki","orcid":"https://orcid.org/0000-0003-2646-3962","observed_orcids":["https://orcid.org/0000-0003-2646-3962"]},"institutions":[{"id":"https://openalex.org/I4210159731","display_name":"LIP6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]},{"id":"https://openalex.org/I4405264447","display_name":"Universit\u00e9 Pierre-et-Marie-Curie","ror":"https://ror.org/01yvrd251","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081","https://openalex.org/I4405264447"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Mariem Turki","raw_affiliation_strings":["Laboratoire d\u2019Informatique de Paris 6, Universite de Pierre et Marie Curie, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d\u2019Informatique de Paris 6, Universite de Pierre et Marie Curie, Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I4405264447"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111822030","display_name":"Zied Marrakchi","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Zied Marrakchi","raw_affiliation_strings":["Flexras Technologies, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Flexras Technologies, Paris, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108405631","display_name":"Habib Mehrez","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210159731","display_name":"LIP6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]},{"id":"https://openalex.org/I4405264447","display_name":"Universit\u00e9 Pierre-et-Marie-Curie","ror":"https://ror.org/01yvrd251","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081","https://openalex.org/I4405264447"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Habib Mehrez","raw_affiliation_strings":["Laboratoire d\u2019Informatique de Paris 6, Universite de Pierre et Marie Curie, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d\u2019Informatique de Paris 6, Universite de Pierre et Marie Curie, Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I4405264447"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026522015","display_name":"Mohamed Abid","orcid":"https://orcid.org/0000-0001-7409-292X","observed_orcids":["https://orcid.org/0000-0001-7409-292X"]},"institutions":[{"id":"https://openalex.org/I142899784","display_name":"University of Sfax","ror":"https://ror.org/04d4sd432","country_code":"TN","type":"education","lineage":["https://openalex.org/I142899784"]}],"countries":["TN"],"is_corresponding":false,"raw_author_name":"Mohamed Abid","raw_affiliation_strings":["CES Laboratory, Sfax University, Tunisia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CES Laboratory, Sfax University, Tunisia","institution_ids":["https://openalex.org/I142899784"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":2.8509,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.90350556,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":87,"max":97},"biblio":{"volume":"7806","issue":null,"first_page":"210","last_page":"217"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.6064000129699707,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.6064000129699707,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.29789999127388,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.06669999659061432,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/time-division-multiplexing","display_name":"time-division multiplexing","score":0.7009999752044678},{"id":"https://openalex.org/keywords/system-on-chip-testing","display_name":"system-on-chip testing","score":0.7269999980926514}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.899681568145752},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7608509659767151},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6811147928237915},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6037967801094055},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.5615296959877014},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.5574872493743896},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.527759850025177},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4744889736175537},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4662666916847229},{"id":"https://openalex.org/C2778940482","wikidata":"https://www.wikidata.org/wiki/Q7144753","display_name":"Pathfinder","level":2,"score":0.41408854722976685},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3233208656311035},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11897692084312439},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0840352475643158},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06937810778617859},{"id":"https://openalex.org/C161191863","wikidata":"https://www.wikidata.org/wiki/Q199655","display_name":"Library science","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/978-3-642-36812-7_20","doi":"https://doi.org/10.1007/978-3-642-36812-7_20","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-36812-7_20","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","jufo-1","ki-jl-1","norway-1","vabb-shw"],"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:HAL:hal-01372832v1","doi":null,"is_oa":false,"landing_page_url":"https://hal.science/hal-01372832","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I4405252976","host_organization_name":"Centre pour la Communication Scientifique Directe","host_organization_lineage":["https://openalex.org/I4405252976"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ARC 2013 - 9th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, Mar 2013, Los Angeles, CA, United States. pp.210--217, ⟨10.1007/978-3-642-36812-7_20⟩","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.7207000255584717,"id":"https://metadata.un.org/sdg/9"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1968334894","https://openalex.org/W1992578807","https://openalex.org/W2032699516","https://openalex.org/W2109907925","https://openalex.org/W2133712953","https://openalex.org/W2154985610","https://openalex.org/W2196614274","https://openalex.org/W2275304190","https://openalex.org/W2752885492","https://openalex.org/W3145128584","https://openalex.org/W3147395157","https://openalex.org/W4247963789"],"related_works":["https://openalex.org/W2141024358","https://openalex.org/W1998679126","https://openalex.org/W2895183628","https://openalex.org/W2003193909","https://openalex.org/W2261042505","https://openalex.org/W2558337280","https://openalex.org/W2542684176","https://openalex.org/W2079385330","https://openalex.org/W2772067181","https://openalex.org/W2075490772"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2013,"cited_by_count":3}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2016-06-24T00:00:00"}