{"id":"https://openalex.org/W3208345927","doi":"https://doi.org/10.31399/asm.cp.istfa2021p0330","title":"Universal Application of Load Board (L/B) and Socket with Direct Current Tester (DCT) for Various Packages","display_name":"Universal Application of Load Board (L/B) and Socket with Direct Current Tester (DCT) for Various Packages","publication_year":2021,"publication_date":"2021-10-28","ids":{"openalex":"https://openalex.org/W3208345927","doi":"https://doi.org/10.31399/asm.cp.istfa2021p0330","mag":"3208345927"},"language":"en","primary_location":{"id":"doi:10.31399/asm.cp.istfa2021p0330","doi":"https://doi.org/10.31399/asm.cp.istfa2021p0330","is_oa":false,"landing_page_url":"https://doi.org/10.31399/asm.cp.istfa2021p0330","pdf_url":null,"source":{"id":"https://openalex.org/S4220651897","display_name":"Proceedings - International Symposium for Testing and Failure Analysis","issn_l":"0890-1740","issn":["0890-1740"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium for Testing and Failure Analysis","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113145392","display_name":"Yi\u2010Sheng Lin","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I2799432993","display_name":"Advanced Semiconductor Engineering (Taiwan)","ror":"https://ror.org/04rgfzt17","country_code":"TW","type":"company","lineage":["https://openalex.org/I2799432993"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Sheng Lin","raw_affiliation_strings":["Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I2799432993"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030483217","display_name":"Yu\u2010Hsiang Hsiao","orcid":"https://orcid.org/0000-0002-7524-7476","observed_orcids":["https://orcid.org/0000-0002-7524-7476"]},"institutions":[{"id":"https://openalex.org/I2799432993","display_name":"Advanced Semiconductor Engineering (Taiwan)","ror":"https://ror.org/04rgfzt17","country_code":"TW","type":"company","lineage":["https://openalex.org/I2799432993"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Hsiang Hsiao","raw_affiliation_strings":["Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I2799432993"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090813372","display_name":"Pei-Yu Tseng","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I2799432993","display_name":"Advanced Semiconductor Engineering (Taiwan)","ror":"https://ror.org/04rgfzt17","country_code":"TW","type":"company","lineage":["https://openalex.org/I2799432993"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Pei-Yu Tseng","raw_affiliation_strings":["Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I2799432993"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101269031","display_name":"Yu-Jen Chang","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I2799432993","display_name":"Advanced Semiconductor Engineering (Taiwan)","ror":"https://ror.org/04rgfzt17","country_code":"TW","type":"company","lineage":["https://openalex.org/I2799432993"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Jen Chang","raw_affiliation_strings":["Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I2799432993"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007216144","display_name":"Cheng\u2010Hsin Liu","orcid":"https://orcid.org/0000-0002-4582-4551","observed_orcids":["https://orcid.org/0000-0002-4582-4551"]},"institutions":[{"id":"https://openalex.org/I2799432993","display_name":"Advanced Semiconductor Engineering (Taiwan)","ror":"https://ror.org/04rgfzt17","country_code":"TW","type":"company","lineage":["https://openalex.org/I2799432993"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Hsin Liu","raw_affiliation_strings":["Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I2799432993"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102775192","display_name":"Yu-Ting Lin","orcid":"https://orcid.org/0009-0005-9315-1258","observed_orcids":["https://orcid.org/0009-0005-9315-1258","https://orcid.org/0000-0003-3634-2793"]},"institutions":[{"id":"https://openalex.org/I2799432993","display_name":"Advanced Semiconductor Engineering (Taiwan)","ror":"https://ror.org/04rgfzt17","country_code":"TW","type":"company","lineage":["https://openalex.org/I2799432993"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Ting Lin","raw_affiliation_strings":["Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Semiconductor Engineering, Inc., Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I2799432993"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I2799432993"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14991885,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"84215","issue":null,"first_page":"330","last_page":"333"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.0006000000284984708,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.0003000000142492354,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sockets","display_name":"sockets","score":0.5490000247955322},{"id":"https://openalex.org/keywords/electrical-failure-analysis","display_name":"electrical failure analysis","score":0.9049999713897705},{"id":"https://openalex.org/keywords/defect-mapping","display_name":"defect mapping","score":0.9129999876022339},{"id":"https://openalex.org/keywords/open-circuit","display_name":"open circuit","score":0.7379999756813049},{"id":"https://openalex.org/keywords/short-circuit","display_name":"short circuit","score":0.9990000128746033},{"id":"https://openalex.org/keywords/leakage-current","display_name":"leakage current","score":1.0},{"id":"https://openalex.org/keywords/package-types","display_name":"package types","score":0.5910000205039978}],"concepts":[{"id":"https://openalex.org/C177212765","wikidata":"https://www.wikidata.org/wiki/Q627335","display_name":"Workflow","level":2,"score":0.6602932214736938},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6260453462600708},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5466875433921814},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46681615710258484},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4550929069519043},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44060418009757996},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.43678250908851624},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34602707624435425},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3373233675956726},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28553420305252075},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1440521478652954},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.07655909657478333}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.31399/asm.cp.istfa2021p0330","doi":"https://doi.org/10.31399/asm.cp.istfa2021p0330","is_oa":false,"landing_page_url":"https://doi.org/10.31399/asm.cp.istfa2021p0330","pdf_url":null,"source":{"id":"https://openalex.org/S4220651897","display_name":"Proceedings - International Symposium for Testing and Failure Analysis","issn_l":"0890-1740","issn":["0890-1740"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium for Testing and Failure Analysis","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4943999946117401}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3108676163","https://openalex.org/W2145077617","https://openalex.org/W2144045578","https://openalex.org/W3044004025","https://openalex.org/W2116689793","https://openalex.org/W1569571376","https://openalex.org/W3111882729","https://openalex.org/W3112535595","https://openalex.org/W4307556221","https://openalex.org/W1586707510"],"abstract_inverted_index":{"Abstract":[0],"This":[1],"paper":[2],"discusses":[3],"the":[4,22,69,72],"development":[5],"of":[6,24,50,71],"an":[7],"electrical":[8],"failure":[9],"analysis":[10],"workflow":[11],"that":[12],"uses":[13],"a":[14,47],"multifunction":[15],"direct":[16],"current":[17],"tester":[18],"(DCT)":[19],"to":[20,45],"map":[21],"location":[23],"defects":[25],"associated":[26],"with":[27,78],"open":[28],"and":[29,41,53,55,80],"short":[30],"circuits":[31],"as":[32,34],"well":[33],"leakage":[35],"current.":[36],"It":[37,62],"explains":[38],"how":[39,56],"software":[40],"tooling":[42],"were":[43,58],"designed":[44],"accommodate":[46],"wide":[48],"range":[49],"package":[51],"types":[52],"sizes":[54],"they":[57],"verified":[59],"by":[60],"testing.":[61],"also":[63],"presents":[64],"two":[65],"case":[66],"studies":[67],"showing":[68],"accuracy":[70],"defect":[73],"mapping":[74],"function":[75],"for":[76],"sockets":[77],"0.8":[79],"1.0":[81],"mm":[82],"ball":[83],"pitch.":[84]},"counts_by_year":[],"updated_date":"2026-10-06T10:28:23.643775","created_date":"2021-11-08T00:00:00"}