{"id":"https://openalex.org/W3091933103","doi":"https://doi.org/10.1109/dac18072.2020.9218515","title":"ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks","display_name":"ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks","publication_year":2020,"publication_date":"2020-07-01","ids":{"openalex":"https://openalex.org/W3091933103","doi":"https://doi.org/10.1109/dac18072.2020.9218515","mag":"3091933103"},"language":"en","primary_location":{"id":"doi:10.1109/dac18072.2020.9218515","doi":"https://doi.org/10.1109/dac18072.2020.9218515","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218515","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"ACM/IEEE Design Automation Conference (DAC)","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029928585","display_name":"Haoxing Mark Ren","orcid":"https://orcid.org/0000-0003-1028-3860","observed_orcids":["https://orcid.org/0000-0003-1028-3860"]},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Haoxing Ren","raw_affiliation_strings":["NVIDIA, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NVIDIA, Austin, TX, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037836008","display_name":"George F. Kokai","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"George F. Kokai","raw_affiliation_strings":["NVIDIA, Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NVIDIA, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041378837","display_name":"Walker J. Turner","orcid":"https://orcid.org/0000-0001-9230-7605","observed_orcids":["https://orcid.org/0000-0001-9230-7605"]},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Walker J. Turner","raw_affiliation_strings":["NVIDIA, Durham, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NVIDIA, Durham, NC, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050940822","display_name":"Ting-Sheng Ku","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ting-Sheng Ku","raw_affiliation_strings":["NVIDIA, Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NVIDIA, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":18.2298,"has_fulltext":false,"cited_by_count":119,"citation_normalized_percentile":{"value":0.99777434,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":93,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.8798999786376953,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.8798999786376953,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.039400000125169754,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.019099999219179153,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/graph-neural-networks","display_name":"graph neural networks","score":0.8690000176429749},{"id":"https://openalex.org/keywords/ensemble-learning","display_name":"ensemble learning","score":0.722000002861023},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"integrated circuit design","score":0.6520000100135803}],"concepts":[{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.7713744640350342},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.7186470031738281},{"id":"https://openalex.org/C2777206241","wikidata":"https://www.wikidata.org/wiki/Q194431","display_name":"Paragraph","level":2,"score":0.6460505723953247},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6409220695495605},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.5867887735366821},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5208102464675903},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4614395499229431},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.45669206976890564},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36883053183555603},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.328799843788147},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3276386857032776},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2988223731517792},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2822675108909607},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1718977391719818},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.10557451844215393},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac18072.2020.9218515","doi":"https://doi.org/10.1109/dac18072.2020.9218515","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac18072.2020.9218515","pdf_url":null,"source":{"id":"https://openalex.org/S4210231368","display_name":"ACM/IEEE Design Automation Conference (DAC)","issn_l":"0738-100X","issn":["0738-100X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core"],"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 57th ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2104491047","https://openalex.org/W2154851992","https://openalex.org/W2187089797","https://openalex.org/W2302255633","https://openalex.org/W2519887557","https://openalex.org/W2604314403","https://openalex.org/W2766453196","https://openalex.org/W2899771611","https://openalex.org/W2945759188","https://openalex.org/W2962756421","https://openalex.org/W2962767366","https://openalex.org/W2971933740","https://openalex.org/W3102476541","https://openalex.org/W3152893301"],"related_works":["https://openalex.org/W3185898267","https://openalex.org/W4316469746","https://openalex.org/W4399487637","https://openalex.org/W4385187236","https://openalex.org/W4408164073","https://openalex.org/W76504398","https://openalex.org/W1866752631","https://openalex.org/W48176555","https://openalex.org/W4416931369","https://openalex.org/W7214701522"],"abstract_inverted_index":{"Layout-dependent":[0],"parasitics":[1,27,55],"and":[2,10,20,36,56,65,75,115],"device":[3,57],"parameters":[4,58],"significantly":[5],"impact":[6],"integrated":[7],"circuit":[8,61],"performance":[9],"are":[11],"often":[12],"the":[13,37,80,103],"cause":[14],"of":[15,82,92,100],"slow":[16],"convergences":[17],"between":[18,34],"schematic":[19],"layout":[21],"designs.":[22],"Circuit":[23],"designers":[24,35],"typically":[25],"estimate":[26],"from":[28,120],"past":[29],"experience,":[30],"resulting":[31],"in":[32],"variability":[33],"potential":[38],"for":[39],"inaccuracies.":[40],"In":[41],"this":[42],"paper,":[43],"we":[44],"present":[45],"ParaGraph:":[46],"a":[47,89,97],"graph":[48],"neural":[49],"network":[50],"model":[51,86,104],"to":[52,126],"predict":[53],"net":[54],"by":[59],"converting":[60],"schematics":[62],"into":[63],"graphs":[64],"leveraging":[66],"key":[67],"modeling":[68,84],"techniques":[69],"based":[70],"on":[71,96],"GraphSage,":[72],"Relation":[73],"GCN":[74],"Graph":[76],"Attention":[77],"Networks.":[78],"Furthermore,":[79],"use":[81],"ensemble":[83],"increases":[85],"accuracy":[87],"over":[88,121],"large":[90,98],"range":[91],"prediction":[93,108],"values.":[94],"Trained":[95],"dataset":[99],"industrial":[101],"circuits,":[102],"achieves":[105],"an":[106],"average":[107,117],"R2of":[109],"0.772":[110],"(110%":[111],"better":[112],"than":[113,128],"XGBoost)":[114],"reduces":[116],"simulation":[118],"errors":[119],"100%":[122],"with":[123],"designer's":[124],"estimation":[125],"less":[127],"10%.":[129]},"counts_by_year":[{"year":2026,"cited_by_count":20},{"year":2025,"cited_by_count":26},{"year":2024,"cited_by_count":21},{"year":2023,"cited_by_count":14},{"year":2022,"cited_by_count":24},{"year":2021,"cited_by_count":12},{"year":2020,"cited_by_count":2}],"updated_date":"2026-11-10T11:39:43.021295","created_date":"2020-10-15T00:00:00"}