{"id":"https://openalex.org/W3020938869","doi":"https://doi.org/10.1016/b978-1-4832-0775-9.50017-8","title":"Parallel Processors","display_name":"Parallel Processors","publication_year":1994,"publication_date":"1994-01-01","ids":{"openalex":"https://openalex.org/W3020938869","doi":"https://doi.org/10.1016/b978-1-4832-0775-9.50017-8","mag":"3020938869"},"language":"en","primary_location":{"id":"doi:10.1016/b978-1-4832-0775-9.50017-8","doi":"https://doi.org/10.1016/b978-1-4832-0775-9.50017-8","is_oa":false,"landing_page_url":"https://doi.org/10.1016/b978-1-4832-0775-9.50017-8","pdf_url":null,"source":{"id":"https://openalex.org/S4306463230","display_name":"Elsevier eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer Organization and Design","raw_type":"book-chapter"},"volume":{"id":"https://openalex.org/W4243513274","display_name":"Computer Organization and Design"},"type":"book-chapter","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022706180","display_name":"John LeRoy Hennessy","orcid":"https://orcid.org/0000-0003-0356-1041","observed_orcids":["https://orcid.org/0000-0003-0356-1041"]},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John L. Hennessy","raw_affiliation_strings":["Stanford University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077202069","display_name":"David A. Patterson","orcid":"https://orcid.org/0000-0003-0902-7093","observed_orcids":["https://orcid.org/0000-0003-0902-7093"]},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David A. Patterson","raw_affiliation_strings":["University of California at Berkeley"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California at Berkeley","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"594","last_page":"648"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parallel-processors","display_name":"parallel processors","score":0.9990000128746033},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.8820000290870667},{"id":"https://openalex.org/keywords/mimd","display_name":"MIMD","score":0.9980000257492065},{"id":"https://openalex.org/keywords/data-parallelism","display_name":"data parallelism","score":0.8339999914169312},{"id":"https://openalex.org/keywords/parallel-programming","display_name":"parallel programming","score":0.4390000104904175},{"id":"https://openalex.org/keywords/interconnection-networks","display_name":"interconnection networks","score":0.5049999952316284},{"id":"https://openalex.org/keywords/synchronization","display_name":"synchronization","score":0.3109999895095825},{"id":"https://openalex.org/keywords/memory-locality","display_name":"memory locality","score":0.5490000247955322},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"distributed memory","score":0.6819999814033508},{"id":"https://openalex.org/keywords/parallel-machine-architecture","display_name":"parallel machine architecture","score":0.32199999690055847}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8665224313735962},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.850309431552887},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7743080258369446},{"id":"https://openalex.org/C21032095","wikidata":"https://www.wikidata.org/wiki/Q1149237","display_name":"MIMD","level":2,"score":0.7652783393859863},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5227825045585632},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5125329494476318},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4576110243797302},{"id":"https://openalex.org/C137364921","wikidata":"https://www.wikidata.org/wiki/Q27929394","display_name":"Parallel programming model","level":3,"score":0.45203956961631775},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.4156273603439331},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.2903880178928375},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.24517306685447693},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11994606256484985},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0987553596496582},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/b978-1-4832-0775-9.50017-8","doi":"https://doi.org/10.1016/b978-1-4832-0775-9.50017-8","is_oa":false,"landing_page_url":"https://doi.org/10.1016/b978-1-4832-0775-9.50017-8","pdf_url":null,"source":{"id":"https://openalex.org/S4306463230","display_name":"Elsevier eBooks","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"ebook platform"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer Organization and Design","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1971361763","https://openalex.org/W7165014582","https://openalex.org/W1567881053","https://openalex.org/W1985921747","https://openalex.org/W810171029","https://openalex.org/W2111450650","https://openalex.org/W4240027786","https://openalex.org/W2026001601","https://openalex.org/W2160655116","https://openalex.org/W4205558608"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-10-10T09:11:00.788812","created_date":"2020-05-13T00:00:00"}
