{"id":"https://openalex.org/W2995228010","doi":"https://doi.org/10.1080/03772063.2019.1700833","title":"A High-Speed, Low-Power, and Area-Efficient FGMOS-Based Full Adder","display_name":"A High-Speed, Low-Power, and Area-Efficient FGMOS-Based Full Adder","publication_year":2019,"publication_date":"2019-12-17","ids":{"openalex":"https://openalex.org/W2995228010","doi":"https://doi.org/10.1080/03772063.2019.1700833","mag":"2995228010"},"language":"en","primary_location":{"id":"doi:10.1080/03772063.2019.1700833","doi":"https://doi.org/10.1080/03772063.2019.1700833","is_oa":false,"landing_page_url":"https://doi.org/10.1080/03772063.2019.1700833","pdf_url":null,"source":{"id":"https://openalex.org/S158263287","display_name":"IETE Journal of Research","issn_l":"0377-2063","issn":["0377-2063","0974-780X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-d","jufo-1","norway-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310320547","host_organization_name":"Taylor & Francis","host_organization_lineage":["https://openalex.org/P4310320547","https://openalex.org/P4310320449"],"host_organization_lineage_names":["Taylor & Francis","Informa"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IETE Journal of Research","raw_type":"journal-article"},"parent_works":[],"lineage":["https://openalex.org/W2995228010"],"child_works_count":0,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084244866","display_name":"Roshani Gupta","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I145846420","display_name":"University of Jammu","ror":"https://ror.org/02retg991","country_code":"IN","type":"education","lineage":["https://openalex.org/I145846420"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Roshani Gupta","raw_affiliation_strings":["Department of Electronics, University of Jammu, Jammu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, University of Jammu, Jammu, India","institution_ids":["https://openalex.org/I145846420"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081216160","display_name":"Rockey Gupta","orcid":"https://orcid.org/0000-0002-5798-7139","observed_orcids":["https://orcid.org/0000-0002-5798-7139"]},"institutions":[{"id":"https://openalex.org/I145846420","display_name":"University of Jammu","ror":"https://ror.org/02retg991","country_code":"IN","type":"education","lineage":["https://openalex.org/I145846420"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rockey Gupta","raw_affiliation_strings":["Department of Electronics, University of Jammu, Jammu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, University of Jammu, Jammu, India","institution_ids":["https://openalex.org/I145846420"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081525585","display_name":"Susheel Sharma","orcid":"https://orcid.org/0000-0002-3520-5415","observed_orcids":["https://orcid.org/0000-0002-3520-5415"]},"institutions":[{"id":"https://openalex.org/I145846420","display_name":"University of Jammu","ror":"https://ror.org/02retg991","country_code":"IN","type":"education","lineage":["https://openalex.org/I145846420"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Susheel Sharma","raw_affiliation_strings":["Department of Electronics, University of Jammu, Jammu, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, University of Jammu, Jammu, India","institution_ids":["https://openalex.org/I145846420"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I145846420"],"apc_list":null,"apc_paid":null,"fwci":0.1807,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.44311431,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":96},"biblio":{"volume":"68","issue":"3","first_page":"2305","last_page":"2311"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.002099999925121665,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.000699999975040555,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/full-adder","display_name":"full adder","score":0.9679999947547913},{"id":"https://openalex.org/keywords/floating-gate-mosfet","display_name":"floating gate MOSFET","score":0.996999979019165},{"id":"https://openalex.org/keywords/low-power-digital-circuits","display_name":"low-power digital circuits","score":0.6669999957084656},{"id":"https://openalex.org/keywords/high-speed-arithmetic-circuits","display_name":"high-speed arithmetic circuits","score":0.8289999961853027},{"id":"https://openalex.org/keywords/area-efficient-circuit-design","display_name":"area-efficient circuit design","score":0.7120000123977661},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"propagation delay","score":0.7900000214576721},{"id":"https://openalex.org/keywords/power-delay-product","display_name":"power-delay product","score":0.9010000228881836},{"id":"https://openalex.org/keywords/cmos-logic-design","display_name":"CMOS logic design","score":0.5249999761581421},{"id":"https://openalex.org/keywords/threshold-voltage-reduction","display_name":"threshold voltage reduction","score":0.5149999856948853}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9558457136154175},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7143828868865967},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.609756350517273},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5695136785507202},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.5609327554702759},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.555595338344574},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.47429969906806946},{"id":"https://openalex.org/C116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","level":4,"score":0.4246794581413269},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4234699010848999},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26337212324142456}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1080/03772063.2019.1700833","doi":"https://doi.org/10.1080/03772063.2019.1700833","is_oa":false,"landing_page_url":"https://doi.org/10.1080/03772063.2019.1700833","pdf_url":null,"source":{"id":"https://openalex.org/S158263287","display_name":"IETE Journal of Research","issn_l":"0377-2063","issn":["0377-2063","0974-780X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","dongbi-d","jufo-1","norway-1","poland-40","russia-white-list-2"],"host_organization":"https://openalex.org/P4310320547","host_organization_name":"Taylor & Francis","host_organization_lineage":["https://openalex.org/P4310320547","https://openalex.org/P4310320449"],"host_organization_lineage_names":["Taylor & Francis","Informa"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IETE Journal of Research","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1968987637","https://openalex.org/W2025315299","https://openalex.org/W2071491936","https://openalex.org/W2079369137","https://openalex.org/W2095300229","https://openalex.org/W2127696501","https://openalex.org/W2144038159","https://openalex.org/W2166353506","https://openalex.org/W2187874179","https://openalex.org/W2224644010","https://openalex.org/W2346956813","https://openalex.org/W2376663559","https://openalex.org/W2606636341"],"related_works":["https://openalex.org/W2069709821","https://openalex.org/W1598535097","https://openalex.org/W2376663559","https://openalex.org/W2240783923","https://openalex.org/W2100207144","https://openalex.org/W3185490203","https://openalex.org/W7171119932","https://openalex.org/W1993454966","https://openalex.org/W1988722458","https://openalex.org/W7128912259"],"abstract_inverted_index":{"Full":[0],"adder":[1,43,119,126,139,169],"is":[2,49,81],"one":[3],"of":[4,8,15,30,40,85,97,116,145,173,196],"the":[5,28,38,54,61,65,79,82,86,91,130,161,211],"fundamental":[6],"components":[7],"very":[9],"large-scale":[10],"digital":[11],"integrated":[12],"systems,":[13],"capable":[14],"performing":[16],"all":[17],"arithmetic":[18],"operations.":[19],"High-performance":[20],"full":[21,42,112,118,125,138,168],"adders":[22],"are":[23,57],"always":[24],"desired":[25],"to":[26,60,160,205],"meet":[27],"challenges":[29],"ever":[31],"growing":[32],"integration":[33],"technology.":[34],"This":[35,95],"paper":[36,104],"presents":[37],"design":[39],"a":[41,50,107],"using":[44,184],"floating-gate":[45,80],"MOSFET":[46],"(FGMOS).":[47],"FGMOS":[48,98],"multi-input":[51],"transistor":[52,163],"where":[53],"input":[55,87,93],"signals":[56],"capacitively":[58],"coupled":[59],"floating":[62],"gate,":[63],"and":[64,110,150],"effective":[66],"threshold":[67],"voltage":[68,77,195],"can":[69],"be":[70,206],"lowered":[71],"from":[72],"its":[73],"conventional":[74],"value.":[75],"The":[76,114,171,199],"on":[78],"weighted":[83],"sum":[84],"voltages":[88],"applied":[89],"at":[90],"multiple":[92],"gates.":[94],"feature":[96],"has":[99,120,133,176],"been":[100,121,134,177,203],"exploited":[101],"in":[102,129,143,188,207],"this":[103],"for":[105],"designing":[106],"high-speed,":[108],"low-power,":[109],"area-efficient":[111],"adder.":[113],"performance":[115,142],"FGMOS-based":[117,137],"compared":[122,165],"with":[123,166,193,210],"other":[124],"designs":[127],"available":[128],"literature.":[131],"It":[132],"observed":[135],"that":[136],"exhibits":[140],"better":[141],"terms":[144],"propagation":[146],"delay,":[147],"power":[148,151],"consumption,":[149],"delay":[152],"product":[153],"besides":[154],"consuming":[155],"less":[156],"chip":[157],"area":[158],"due":[159],"reduced":[162],"count":[164],"existing":[167],"designs.":[170],"workability":[172],"these":[174],"circuits":[175],"verified":[178],"by":[179],"PSpice":[180],"simulations":[181],"carried":[182],"out":[183],"level":[185],"7":[186],"parameters":[187],"0.13":[189],"\u00b5m":[190],"CMOS":[191],"technology":[192],"supply":[194],"1":[197],"V.":[198],"simulation":[200],"results":[201],"have":[202],"found":[204],"good":[208],"conformity":[209],"mathematical":[212],"formulations.":[213]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2}],"updated_date":"2026-09-11T09:22:31.653822","created_date":"2019-12-26T00:00:00"}