{"id":"https://openalex.org/W2965949963","doi":"https://doi.org/10.1109/ccaa.2018.8777564","title":"Hardware Implementation Issues on Image Processing Algorithms","display_name":"Hardware Implementation Issues on Image Processing Algorithms","publication_year":2018,"publication_date":"2018-12-01","ids":{"openalex":"https://openalex.org/W2965949963","doi":"https://doi.org/10.1109/ccaa.2018.8777564","mag":"2965949963"},"language":"en","primary_location":{"id":"doi:10.1109/ccaa.2018.8777564","doi":"https://doi.org/10.1109/ccaa.2018.8777564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccaa.2018.8777564","pdf_url":null,"source":{"id":"https://openalex.org/S4306423450","display_name":"International Conference on Computing, Communication and Automation","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 4th International Conference on Computing Communication and Automation (ICCCA)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Prathap Soma","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I121750182","display_name":"National Institute of Technology Warangal","ror":"https://ror.org/017ebfz38","country_code":"IN","type":"education","lineage":["https://openalex.org/I121750182"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Prathap Soma","raw_affiliation_strings":["Electronics and Communication Engineering NIT Warangal, Warangal, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Communication Engineering NIT Warangal, Warangal, India","institution_ids":["https://openalex.org/I121750182"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020590889","display_name":"Ravi Kumar Jatoth","orcid":"https://orcid.org/0000-0002-7634-6951","observed_orcids":["https://orcid.org/0000-0002-7634-6951"]},"institutions":[{"id":"https://openalex.org/I121750182","display_name":"National Institute of Technology Warangal","ror":"https://ror.org/017ebfz38","country_code":"IN","type":"education","lineage":["https://openalex.org/I121750182"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ravi Kumar Jatoth","raw_affiliation_strings":["Electronics and Communication Engineering NIT Warangal, Warangal, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Communication Engineering NIT Warangal, Warangal, India","institution_ids":["https://openalex.org/I121750182"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I121750182"],"apc_list":null,"apc_paid":null,"fwci":1.1989,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.71535612,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":87,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9506999850273132,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9506999850273132,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.04650000110268593,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.0012000000569969416,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hardware-implementation","display_name":"hardware implementation","score":0.6039999723434448},{"id":"https://openalex.org/keywords/image-processing-techniques","display_name":"image processing algorithms","score":0.9610000252723694},{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.9139999747276306},{"id":"https://openalex.org/keywords/sobel-edge-detection","display_name":"Sobel edge detection","score":0.8209999799728394},{"id":"https://openalex.org/keywords/zynq-7020","display_name":"Zynq-7020","score":0.972000002861023},{"id":"https://openalex.org/keywords/hardware-accelerators","display_name":"hardware accelerators","score":0.7120000123977661},{"id":"https://openalex.org/keywords/computational-speed","display_name":"computational speed","score":0.5879999995231628}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8014491200447083},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7972358465194702},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.742015540599823},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.5659911036491394},{"id":"https://openalex.org/C30703548","wikidata":"https://www.wikidata.org/wiki/Q1757673","display_name":"Sobel operator","level":5,"score":0.5546600818634033},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.503091037273407},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.49981188774108887},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4538196623325348},{"id":"https://openalex.org/C193536780","wikidata":"https://www.wikidata.org/wiki/Q1513153","display_name":"Edge detection","level":4,"score":0.42638108134269714},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4204178750514984},{"id":"https://openalex.org/C3261483","wikidata":"https://www.wikidata.org/wiki/Q119565","display_name":"Frame rate","level":2,"score":0.41330695152282715},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3807470202445984},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3058841824531555},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.2759363055229187},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ccaa.2018.8777564","doi":"https://doi.org/10.1109/ccaa.2018.8777564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccaa.2018.8777564","pdf_url":null,"source":{"id":"https://openalex.org/S4306423450","display_name":"International Conference on Computing, Communication and Automation","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 4th International Conference on Computing Communication and Automation (ICCCA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W941487452","https://openalex.org/W1533162639","https://openalex.org/W1579352825","https://openalex.org/W1603245819","https://openalex.org/W2031051084","https://openalex.org/W2051666323","https://openalex.org/W2071630526","https://openalex.org/W2135833139","https://openalex.org/W2765663085","https://openalex.org/W4214545081"],"related_works":["https://openalex.org/W4210472893","https://openalex.org/W2914205025","https://openalex.org/W2619894519","https://openalex.org/W2900067201","https://openalex.org/W3111191642","https://openalex.org/W2154115406","https://openalex.org/W4384154176","https://openalex.org/W6963999731","https://openalex.org/W63174244","https://openalex.org/W203339978"],"abstract_inverted_index":{"The":[0],"image/video":[1],"processing":[2,19,44,75,94],"and":[3,14,72],"computer":[4],"vision":[5],"algorithms":[6,77,95],"are":[7,37,131],"crucial":[8],"mechanisms":[9],"of":[10,57,92,101,104,110,118],"many":[11],"manufacturing,":[12],"bio-medical,":[13],"research-related":[15],"applications.":[16],"Recent":[17],"image":[18,33,93],"system":[20],"offers":[21],"high":[22,27],"definition":[23],"(HD)":[24],"images":[25],"at":[26],"frame":[28],"rates;":[29],"to":[30,53],"process":[31],"this":[32],"data":[34],"complex":[35],"computations":[36,63],"required.":[38],"Conversely,":[39],"in":[40],"several":[41],"applications":[42],"rapid":[43],"is":[45,51],"needed.":[46],"Central":[47],"Processing":[48],"Unit":[49],"(CPU)":[50],"insufficient":[52,65],"perform":[54],"these":[55],"type":[56],"applications,":[58],"as":[59],"they":[60],"accomplish":[61],"the":[62,69,74,112,116,119,128],"with":[64,115],"speed.":[66],"To":[67],"minimize":[68],"computational":[70],"time":[71],"increasing":[73],"speed,":[76],"can":[78],"be":[79],"implemented":[80],"on":[81,123],"hardware":[82,90],"accelerators":[83],"like":[84],"field-programmable":[85],"gate":[86],"arrays":[87],"(FPGAs).":[88],"While":[89],"implementation":[91,117],"designer":[96],"will":[97],"face":[98],"a":[99],"lot":[100],"problems":[102],"(type":[103],"FPGA":[105],"used,":[106],"available":[107],"tools,":[108],"ways":[109],"implementing":[111],"algorithms).":[113],"Along":[114],"Sobel":[120],"edge":[121],"detection":[122],"zynq-702":[124],"all":[125],"programmable":[126],"FPGA,":[127],"above-mentioned":[129],"concerns":[130],"addressed.":[132]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2}],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2019-08-13T00:00:00"}