{"id":"https://openalex.org/W2906857006","doi":"https://doi.org/10.1109/concapan.2018.8596543","title":"Basic Computer Vision Operators Hardware Approach Model","display_name":"Basic Computer Vision Operators Hardware Approach Model","publication_year":2018,"publication_date":"2018-11-01","ids":{"openalex":"https://openalex.org/W2906857006","doi":"https://doi.org/10.1109/concapan.2018.8596543","mag":"2906857006"},"language":"en","primary_location":{"id":"doi:10.1109/concapan.2018.8596543","doi":"https://doi.org/10.1109/concapan.2018.8596543","is_oa":false,"landing_page_url":"https://doi.org/10.1109/concapan.2018.8596543","pdf_url":null,"source":{"id":"https://openalex.org/S7407087823","display_name":"IEEE Central America and Panama Convention (CONCAPAN)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 38th Central America and Panama Convention (CONCAPAN XXXVIII)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101597324","display_name":"Carlos Hern\u00e1ndez","orcid":"https://orcid.org/0000-0002-1884-9024","observed_orcids":["https://orcid.org/0000-0002-1884-9024"]},"institutions":[{"id":"https://openalex.org/I4210105079","display_name":"Universidad Don Bosco","ror":"https://ror.org/01k8z5j70","country_code":"SV","type":"education","lineage":["https://openalex.org/I4210105079"]}],"countries":["SV"],"is_corresponding":false,"raw_author_name":"Carlos Hernandez","raw_affiliation_strings":["Instituto de Investigaci\u00f3n e Innovaci\u00f3n en Electr\u00f3nica, Universidad Don Bosco, Soyapango, El Salvador"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Investigaci\u00f3n e Innovaci\u00f3n en Electr\u00f3nica, Universidad Don Bosco, Soyapango, El Salvador","institution_ids":["https://openalex.org/I4210105079"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041710473","display_name":"Carlos Bran","orcid":"https://orcid.org/0000-0002-8647-3786","observed_orcids":["https://orcid.org/0000-0002-8647-3786"]},"institutions":[{"id":"https://openalex.org/I4210105079","display_name":"Universidad Don Bosco","ror":"https://ror.org/01k8z5j70","country_code":"SV","type":"education","lineage":["https://openalex.org/I4210105079"]}],"countries":["SV"],"is_corresponding":false,"raw_author_name":"Carlos Bran","raw_affiliation_strings":["Instituto de Investigaci\u00f3n e Innovaci\u00f3n en Electr\u00f3nica, Universidad Don Bosco, Soyapango, El Salvador"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Investigaci\u00f3n e Innovaci\u00f3n en Electr\u00f3nica, Universidad Don Bosco, Soyapango, El Salvador","institution_ids":["https://openalex.org/I4210105079"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210105079"],"apc_list":null,"apc_paid":null,"fwci":0.3674,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.44892108,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":93},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9848999977111816,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9848999977111816,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.013799999840557575,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.000699999975040555,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"hardware acceleration","score":0.9049999713897705},{"id":"https://openalex.org/keywords/embedded-systems","display_name":"embedded systems","score":0.828000009059906},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"high-level synthesis","score":0.7889999747276306},{"id":"https://openalex.org/keywords/fpga","display_name":"FPGA","score":0.6669999957084656},{"id":"https://openalex.org/keywords/programmable-logic","display_name":"programmable logic","score":0.6800000071525574},{"id":"https://openalex.org/keywords/image-processing","display_name":"image processing","score":0.578000009059906},{"id":"https://openalex.org/keywords/vision-sensors","display_name":"vision sensors","score":0.6110000014305115},{"id":"https://openalex.org/keywords/ip-core","display_name":"IP core","score":0.46399998664855957},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"hardware architecture","score":0.3230000138282776},{"id":"https://openalex.org/keywords/video-stream-processing","display_name":"video stream processing","score":0.4659999907016754}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.84388667345047},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.7493910789489746},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49469706416130066},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.48805415630340576},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.48030656576156616},{"id":"https://openalex.org/C170130773","wikidata":"https://www.wikidata.org/wiki/Q216378","display_name":"Usability","level":2,"score":0.47170543670654297},{"id":"https://openalex.org/C17020691","wikidata":"https://www.wikidata.org/wiki/Q139677","display_name":"Operator (biology)","level":5,"score":0.4177427887916565},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.41117367148399353},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33035728335380554},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3124452233314514},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.2545386552810669},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.20233020186424255},{"id":"https://openalex.org/C107457646","wikidata":"https://www.wikidata.org/wiki/Q207434","display_name":"Human\u2013computer interaction","level":1,"score":0.15266266465187073},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.10381659865379333},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C158448853","wikidata":"https://www.wikidata.org/wiki/Q425218","display_name":"Repressor","level":4,"score":0.0},{"id":"https://openalex.org/C86339819","wikidata":"https://www.wikidata.org/wiki/Q407384","display_name":"Transcription factor","level":3,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/concapan.2018.8596543","doi":"https://doi.org/10.1109/concapan.2018.8596543","is_oa":false,"landing_page_url":"https://doi.org/10.1109/concapan.2018.8596543","pdf_url":null,"source":{"id":"https://openalex.org/S7407087823","display_name":"IEEE Central America and Panama Convention (CONCAPAN)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 38th Central America and Panama Convention (CONCAPAN XXXVIII)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5378999710083008,"id":"https://metadata.un.org/sdg/9"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W214577476","https://openalex.org/W598510962","https://openalex.org/W1900607016","https://openalex.org/W1934160092","https://openalex.org/W1950402354","https://openalex.org/W1971478924","https://openalex.org/W2034601083","https://openalex.org/W2160642395","https://openalex.org/W2188922879","https://openalex.org/W2544799496"],"related_works":["https://openalex.org/W2031986751","https://openalex.org/W2468531342","https://openalex.org/W2019030970","https://openalex.org/W2136397295","https://openalex.org/W2071326426","https://openalex.org/W1975315537","https://openalex.org/W2165927839","https://openalex.org/W2081510580","https://openalex.org/W7026430876","https://openalex.org/W4205567392"],"abstract_inverted_index":{"The":[0,27,103,143],"development":[1,126],"of":[2,13,22,37,45,54,71,100,105,114,127,152,179,188],"vision":[3,38,58,158],"sensors":[4,36],"at":[5],"a":[6,171],"lower":[7],"cost":[8],"has":[9],"prompted":[10],"the":[11,20,52,55,69,97,101,118,122,140,147,177],"creation":[12],"new":[14,123],"applications":[15],"that":[16,108,173],"are":[17,31,60],"based":[18],"on":[19,64,68,89,183],"processing":[21,41,72],"images":[23,184],"and":[24,39,48,112,121,149,168],"video":[25],"streams.":[26],"automatic":[28],"control":[29,56],"systems":[30,79,107,130],"increasingly":[32],"being":[33],"supported":[34],"by":[35],"image":[40],"to":[42,51,62,84,95,133,136,138,154,164,175],"solve":[43],"problems":[44],"classification,":[46],"matching":[47],"tracking.":[49],"Due":[50],"nature":[53],"applications,":[57],"operators":[59],"required":[61],"run":[63],"embedded":[65,106],"systems,":[66],"depending":[67],"type":[70],"can":[73],"be":[74],"very":[75],"demanding":[76],"for":[77,125],"sequential":[78,110],"so":[80],"it":[81],"is":[82,93],"necessary":[83],"execute":[85],"these":[86,189],"tasks":[87,178,190],"directly":[88],"hardware":[90],"with":[91],"what":[92],"possible":[94],"improve":[96],"execution":[98,141],"times":[99],"operator.":[102],"use":[104],"include":[109],"regions":[111,113],"programmable":[115],"logic":[116],"in":[117,161,191],"same":[119],"chip":[120],"tools":[124],"high":[128],"level":[129],"HLS":[131],"allows":[132,174],"carry":[134],"functions":[135],"circuit":[137],"accelerate":[139,176],"times.":[142],"present":[144],"work":[145],"describes":[146],"results":[148],"evaluation":[150],"architecture":[151],"synthesizing":[153],"circuits":[155],"basic":[156],"computer":[157],"operators,":[159],"encapsulated":[160],"an":[162],"IPCore":[163],"guarantee":[165],"its":[166],"portability":[167],"re-usability.":[169],"Proposing":[170],"procedure":[172],"more":[180],"complex":[181],"operations":[182],"when":[185],"executing":[186],"parts":[187],"hardware.":[192]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-10-16T09:59:22.235173","created_date":"2019-01-11T00:00:00"}
