{"id":"https://openalex.org/W2902132001","doi":"https://doi.org/10.1109/tvlsi.2018.2879675","title":"A High-Flexible Low-Latency Memory-Based FFT Processor for 4G, WLAN, and Future 5G","display_name":"A High-Flexible Low-Latency Memory-Based FFT Processor for 4G, WLAN, and Future 5G","publication_year":2018,"publication_date":"2018-11-27","ids":{"openalex":"https://openalex.org/W2902132001","doi":"https://doi.org/10.1109/tvlsi.2018.2879675","mag":"2902132001"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2018.2879675","doi":"https://doi.org/10.1109/tvlsi.2018.2879675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2879675","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-b","cwts-core","dongbi-c","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"parent_works":[],"lineage":["https://openalex.org/W2902132001"],"child_works_count":0,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103042212","display_name":"Shaohan Liu","orcid":"https://orcid.org/0000-0003-2146-4632","observed_orcids":["https://orcid.org/0000-0003-2146-4632"]},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shaohan Liu","raw_affiliation_strings":["School of Information and Electronics, Beijing Institute of Technology, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0003-2146-4632","affiliations":[{"raw_affiliation_string":"School of Information and Electronics, Beijing Institute of Technology, Beijing, China","institution_ids":["https://openalex.org/I125839683"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011014977","display_name":"Dake Liu","orcid":"https://orcid.org/0000-0002-4644-4892","observed_orcids":["https://orcid.org/0000-0002-4644-4892"]},"institutions":[{"id":"https://openalex.org/I125839683","display_name":"Beijing Institute of Technology","ror":"https://ror.org/01skt4w74","country_code":"CN","type":"education","lineage":["https://openalex.org/I125839683","https://openalex.org/I890469752"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dake Liu","raw_affiliation_strings":["School of Information and Electronics, Beijing Institute of Technology, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-4644-4892","affiliations":[{"raw_affiliation_string":"School of Information and Electronics, Beijing Institute of Technology, Beijing, China","institution_ids":["https://openalex.org/I125839683"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I125839683"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":3.6207,"has_fulltext":false,"cited_by_count":84,"citation_normalized_percentile":{"value":0.93990809,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":100},"biblio":{"volume":"27","issue":"3","first_page":"511","last_page":"523"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9824000000953674,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9824000000953674,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.008500000461935997,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.0013000000035390258,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fft-processor","display_name":"FFT processor","score":0.8799999952316284},{"id":"https://openalex.org/keywords/memory-based-architecture","display_name":"memory-based architecture","score":0.7950000166893005},{"id":"https://openalex.org/keywords/coordinate-rotation-digital-computer","display_name":"coordinate rotation digital computer","score":0.9100000262260437},{"id":"https://openalex.org/keywords/discrete-fourier-transform","display_name":"discrete Fourier transform","score":0.7850000262260437},{"id":"https://openalex.org/keywords/4g-networks","display_name":"4G","score":0.574999988079071},{"id":"https://openalex.org/keywords/wireless-lan","display_name":"wireless LAN","score":0.7379999756813049},{"id":"https://openalex.org/keywords/5g","display_name":"5G","score":0.9959999918937683},{"id":"https://openalex.org/keywords/hardware-resource-reuse","display_name":"hardware resource reuse","score":0.4699999988079071},{"id":"https://openalex.org/keywords/65-nm-cmos","display_name":"65 nm CMOS","score":0.6830000281333923}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.740013062953949},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.6157866716384888},{"id":"https://openalex.org/C4697666","wikidata":"https://www.wikidata.org/wiki/Q7857913","display_name":"Twiddle factor","level":5,"score":0.5437094569206238},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5264782905578613},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.5164149403572083},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4839951992034912},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45812803506851196},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.455628365278244},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.44317370653152466},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3993542790412903},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3821587860584259},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.24387326836585999},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.16809433698654175},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.14014685153961182},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10935553908348083},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.0},{"id":"https://openalex.org/C166386157","wikidata":"https://www.wikidata.org/wiki/Q1477735","display_name":"Short-time Fourier transform","level":4,"score":0.0},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2018.2879675","doi":"https://doi.org/10.1109/tvlsi.2018.2879675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2018.2879675","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["ccf-b","cwts-core","dongbi-c","jufo-2","norway-1","poland-100","russia-white-list-1"],"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5378999710083008}],"study_designs":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320335773","display_name":"National High-tech Research and Development Program","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W1647505540","https://openalex.org/W1965101604","https://openalex.org/W1967043386","https://openalex.org/W1975210673","https://openalex.org/W1976676268","https://openalex.org/W1978936278","https://openalex.org/W1993834099","https://openalex.org/W1999607082","https://openalex.org/W2015346536","https://openalex.org/W2025849754","https://openalex.org/W2058492380","https://openalex.org/W2080397814","https://openalex.org/W2092689852","https://openalex.org/W2103110226","https://openalex.org/W2104865560","https://openalex.org/W2108410591","https://openalex.org/W2108902229","https://openalex.org/W2109070029","https://openalex.org/W2114827318","https://openalex.org/W2114860984","https://openalex.org/W2135440536","https://openalex.org/W2143760361","https://openalex.org/W2144895495","https://openalex.org/W2154699063","https://openalex.org/W2161509834","https://openalex.org/W2166577902","https://openalex.org/W2170618268","https://openalex.org/W2530636219","https://openalex.org/W2541393808","https://openalex.org/W2588325739","https://openalex.org/W2591710848","https://openalex.org/W2594399252","https://openalex.org/W2597270868","https://openalex.org/W2606981842","https://openalex.org/W2739193618","https://openalex.org/W4237031056","https://openalex.org/W4240704246"],"related_works":["https://openalex.org/W3209349797","https://openalex.org/W3195313063","https://openalex.org/W4403182995","https://openalex.org/W4313147184","https://openalex.org/W7217490657","https://openalex.org/W4211180040","https://openalex.org/W23256082","https://openalex.org/W2967342233","https://openalex.org/W2037788735","https://openalex.org/W4312245489"],"abstract_inverted_index":{"A":[0,32],"high-throughput":[1],"programmable":[2],"fast":[3],"Fourier":[4,20],"transform":[5],"(FFT)":[6],"processor":[7,140,153,157,173,179,204],"is":[8,38,67,109,129,141,175],"designed":[9,142],"supporting":[10,118],"16-":[11],"to":[12,17,69,112,132],"4096-point":[13,183],"FFTs":[14,120],"and":[15,29,45,85,100,121,147,195],"12-":[16],"2400-point":[18],"discrete":[19],"transforms":[21],"(DFTs)":[22],"for":[23],"4G,":[24],"wireless":[25],"local":[26],"area":[27,174,209],"network,":[28],"future":[30],"5G.":[31],"16-path":[33],"data":[34,126],"parallel":[35],"memory-based":[36],"architecture":[37],"selected":[39],"as":[40,143],"a":[41,49,63,86,144,152,167,189,196],"tradeoff":[42],"between":[43],"throughput":[44,207],"cost.":[46],"To":[47,57],"implement":[48],"hardware-efficient":[50],"high-speed":[51],"processor,":[52],"several":[53],"improvements":[54],"are":[55,98],"provided.":[56],"maximally":[58],"reuse":[59],"the":[60,114,172,212],"hardware":[61,115],"resource,":[62],"reconfigurable":[64],"butterfly":[65],"unit":[66,210],"proposed":[68,131,203],"support":[70,133],"computing":[71],"including":[72],"eight":[73],"radix-2":[74],"in":[75,79,83,88],"parallel,":[76,80,84],"four":[77],"radix-3/4":[78],"two":[81],"radix-5/8":[82],"radix-16":[87],"one":[89],"clock":[90],"cycle.":[91],"Twiddle":[92],"factor":[93],"multipliers":[94],"using":[95,151],"different":[96],"schemes":[97],"optimized":[99,124],"compared,":[101],"wherein":[102],"modified":[103],"coordinate":[104],"rotation":[105],"digital":[106],"computer":[107],"scheme":[108,128],"finally":[110],"implemented":[111,150],"minimize":[113],"cost":[116],"while":[117],"both":[119],"DFTs.":[122],"An":[123],"conflict-free":[125],"access":[127],"also":[130],"multiple":[134],"butterflies":[135],"at":[136,185],"any":[137],"radices.":[138],"The":[139,159,178,202],"general":[145],"IP":[146],"can":[148],"be":[149],"synthesizer":[154],"(application-specific":[155],"instruction-set":[156],"designer).":[158],"electronic":[160],"design":[161],"automation":[162],"synthesis":[163],"result":[164],"based":[165],"on":[166],"65-nm":[168],"technology":[169],"shows":[170],"that":[171],"1.46":[176],"mm2.":[177],"supports":[180],"972":[181],"MS/s":[182],"FFT":[184],"250":[186],"MHz":[187],"with":[188],"power":[190],"consumption":[191],"of":[192,199],"68.64":[193],"mW":[194],"signal-to-quantization-noise":[197],"ratio":[198],"66.1":[200],"dB.":[201],"has":[205],"better-normalized":[206],"per":[208],"than":[211],"state-of-the-art":[213],"available":[214],"designs.":[215]},"counts_by_year":[{"year":2026,"cited_by_count":5},{"year":2025,"cited_by_count":17},{"year":2024,"cited_by_count":17},{"year":2023,"cited_by_count":14},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":7}],"updated_date":"2026-11-07T11:25:07.637180","created_date":"2018-12-11T00:00:00"}