{"id":"https://openalex.org/W2739740803","doi":null,"title":"DynMapNoCSIM : A Dynamic Mapping SIMULATOR for Network on Chip based MPSoC","display_name":"DynMapNoCSIM : A Dynamic Mapping SIMULATOR for Network on Chip based MPSoC","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W2739740803","mag":"2739740803"},"language":"en","primary_location":{"id":"pmh:oai:HAL:hal-01198992v1","doi":null,"is_oa":false,"landing_page_url":"https://hal.science/hal-01198992","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I4405252976","host_organization_name":"Centre pour la Communication Scientifique Directe","host_organization_lineage":["https://openalex.org/I4405252976"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Journal of Digital Information Management, 2015, 13 (1), pp.45--54","raw_type":"info:eu-repo/semantics/article"},"volume":null,"type":"article","indexed_in":[],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056872054","display_name":"Mohammed Kamel Benhaoua","orcid":"https://orcid.org/0000-0002-6145-1951","observed_orcids":["https://orcid.org/0000-0002-6145-1951"]},"institutions":[{"id":"https://openalex.org/I137407579","display_name":"Universit\u00e9 Oran 1 Ahmed Ben Bella","ror":"https://ror.org/059et2b68","country_code":"DZ","type":"education","lineage":["https://openalex.org/I137407579"]}],"countries":["DZ"],"is_corresponding":false,"raw_author_name":"Benhaoua, Mohammed Kamel","raw_affiliation_strings":["University of Oran Es-Senia [Oran] | Universit\u00e9 d'Oran Es-Senia [Oran] (BP 1524 ELM_Naouer 31000 oran - Algeria)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Oran Es-Senia [Oran] | Universit\u00e9 d'Oran Es-Senia [Oran] (BP 1524 ELM_Naouer 31000 oran - Algeria)","institution_ids":["https://openalex.org/I137407579"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018561310","display_name":"Amitkumar Singh","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I137407579","display_name":"Universit\u00e9 Oran 1 Ahmed Ben Bella","ror":"https://ror.org/059et2b68","country_code":"DZ","type":"education","lineage":["https://openalex.org/I137407579"]}],"countries":["DZ"],"is_corresponding":false,"raw_author_name":"Singh, Amitkumar","raw_affiliation_strings":["University of Oran Es-Senia [Oran] | Universit\u00e9 d'Oran Es-Senia [Oran] (BP 1524 ELM_Naouer 31000 oran - Algeria)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Oran Es-Senia [Oran] | Universit\u00e9 d'Oran Es-Senia [Oran] (BP 1524 ELM_Naouer 31000 oran - Algeria)","institution_ids":["https://openalex.org/I137407579"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064213915","display_name":"Abou El Hassan Benyamina","orcid":"https://orcid.org/0000-0003-4778-0123","observed_orcids":["https://orcid.org/0000-0003-4778-0123"]},"institutions":[{"id":"https://openalex.org/I137407579","display_name":"Universit\u00e9 Oran 1 Ahmed Ben Bella","ror":"https://ror.org/059et2b68","country_code":"DZ","type":"education","lineage":["https://openalex.org/I137407579"]}],"countries":["DZ"],"is_corresponding":false,"raw_author_name":"Benyamina, Abou El Hassan","raw_affiliation_strings":["University of Oran Es-Senia [Oran] | Universit\u00e9 d'Oran Es-Senia [Oran] (BP 1524 ELM_Naouer 31000 oran - Algeria)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Oran Es-Senia [Oran] | Universit\u00e9 d'Oran Es-Senia [Oran] (BP 1524 ELM_Naouer 31000 oran - Algeria)","institution_ids":["https://openalex.org/I137407579"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036031074","display_name":"Pierre Boulet","orcid":"https://orcid.org/0000-0002-0373-4478","observed_orcids":["https://orcid.org/0000-0002-0373-4478"]},"institutions":[{"id":"https://openalex.org/I2279609970","display_name":"Universit\u00e9 de Lille","ror":"https://ror.org/02kzqn938","country_code":"FR","type":"education","lineage":["https://openalex.org/I2279609970"]},{"id":"https://openalex.org/I4387153239","display_name":"Centre de Recherche en Informatique, Signal et Automatique de Lille","ror":"https://ror.org/05vrs3189","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I2279609970","https://openalex.org/I4387153239","https://openalex.org/I7454413"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Boulet, Pierre","raw_affiliation_strings":["CRIStAL - Centre de Recherche en Informatique, Signal et Automatique de Lille - UMR 9189 (Universit\u00e9 de Lille - Campus scientifique - B\u00e2timent ESPRIT - Avenue Henri Poincar\u00e9 - 59655 Villeneuve d\u2019Ascq - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CRIStAL - Centre de Recherche en Informatique, Signal et Automatique de Lille - UMR 9189 (Universit\u00e9 de Lille - Campus scientifique - B\u00e2timent ESPRIT - Avenue Henri Poincar\u00e9 - 59655 Villeneuve d\u2019Ascq - France)","institution_ids":["https://openalex.org/I2279609970","https://openalex.org/I4387153239"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.382,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.78913226,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"13","issue":"1","first_page":"45","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.00279999990016222,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.0015999999595806003,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dynamic-mapping","display_name":"dynamic mapping","score":0.8610000014305115},{"id":"https://openalex.org/keywords/network-on-chip","display_name":"network-on-chip","score":0.8389999866485596},{"id":"https://openalex.org/keywords/multi-processor-systems-on-chip","display_name":"MPSoC","score":0.8970000147819519},{"id":"https://openalex.org/keywords/network-topology-mapping","display_name":"network topology mapping","score":0.31200000643730164}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.9158385992050171},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8296200037002563},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.587145984172821},{"id":"https://openalex.org/C127705205","wikidata":"https://www.wikidata.org/wiki/Q5748245","display_name":"Heuristics","level":2,"score":0.5806328058242798},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5746756792068481},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5066612362861633},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.482552707195282},{"id":"https://openalex.org/C548217200","wikidata":"https://www.wikidata.org/wiki/Q251","display_name":"Java","level":2,"score":0.4517506957054138},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4408937990665436},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15770557522773743}],"mesh":[],"locations_count":1,"locations":[{"id":"pmh:oai:HAL:hal-01198992v1","doi":null,"is_oa":false,"landing_page_url":"https://hal.science/hal-01198992","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":"https://openalex.org/I4405252976","host_organization_name":"Centre pour la Communication Scientifique Directe","host_organization_lineage":["https://openalex.org/I4405252976"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Journal of Digital Information Management, 2015, 13 (1), pp.45--54","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2108576529","https://openalex.org/W2113302371","https://openalex.org/W1982721171","https://openalex.org/W2263994142","https://openalex.org/W2017984844","https://openalex.org/W4378070756","https://openalex.org/W2161350011","https://openalex.org/W2075165124","https://openalex.org/W2053416924","https://openalex.org/W3124248711"],"abstract_inverted_index":{"To":[0],"fulfill":[1],"the":[2,17,21,31,47,50,98,104,127,132,140,156,163,168],"need":[3,85],"of":[4,20,24,59,97,131,142,165,170],"intensive":[5],"embedded":[6],"computations,":[7],"architects":[8],"have":[9,152,161],"proposed":[10,99,144,173],"Network-on-Chip":[11],"based":[12,116],"Multi-Processor":[13,27],"Systems-on-Chip.":[14],"Applications":[15],"exploit":[16],"distinct":[18],"features":[19,157],"different":[22],"types":[23],"processors":[25],"in":[26],"Systems-on-Chip":[28],"to":[29,103],"optimize":[30],"performance":[32],"metrics:":[33],"overall":[34],"execution":[35],"time,":[36],"energy":[37],"consumption,":[38],"resource":[39],"usage,":[40],"etc.":[41],"Application":[42],"designers":[43],"often":[44],"map":[45],"statically":[46],"tasks":[48],"on":[49],"processors.":[51],"This":[52],"static":[53],"mapping":[54,72,175],"cannot":[55],"handle":[56],"many":[57],"kinds":[58],"applications":[60,75],"such":[61],"as":[62],"those":[63],"with":[64,167],"dynamic":[65,71,100],"workloads":[66],"and":[67,88,172],"one":[68],"must":[69],"use":[70,141],"when":[73],"several":[74],"run":[76],"concurrently.":[77],"As":[78],"such,":[79],"there":[80],"has":[81],"been":[82],"an":[83],"increased":[84],"for":[86,92,120],"defining":[87],"developing":[89],"simulation":[90,96],"software":[91],"carrying":[93],"out":[94],"a":[95,114,148],"Mapping":[101,118],"heuristics":[102],"NoC-based":[105,121,133],"MPSoC":[106,122,134],"architectures.":[107],"In":[108],"this":[109],"paper,":[110],"we":[111,138,160],"present":[112],"DynMapNoCSIM,":[113],"JAVA":[115],"Dynamic":[117,174],"simulator":[119,145],"architecture,":[123],"which":[124],"builds":[125],"upon":[126],"objectoriented":[128],"modular":[129],"design":[130],"architecture":[135],"components.":[136],"Here":[137],"demonstrate":[139],"our":[143],"by":[146],"providing":[147],"conceptual":[149],"detail.":[150],"We":[151],"also":[153],"presented":[154],"all":[155],"offered.":[158],"Finally,":[159],"validated":[162],"outputs":[164],"DynMapNoCSIM":[166],"studies":[169],"existing":[171],"strategies.":[176]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-10-25T09:29:13.331239","created_date":"2017-08-08T00:00:00"}