{"id":"https://openalex.org/W2610360733","doi":"https://doi.org/10.1177/003754979907200303","title":"High-Performance Hardware Description Language simulation: Modeling Issues and Recommended Practices","display_name":"High-Performance Hardware Description Language simulation: Modeling Issues and Recommended Practices","publication_year":1999,"publication_date":"1999-03-01","ids":{"openalex":"https://openalex.org/W2610360733","doi":"https://doi.org/10.1177/003754979907200303","mag":"2610360733"},"language":"en","primary_location":{"id":"doi:10.1177/003754979907200303","doi":"https://doi.org/10.1177/003754979907200303","is_oa":false,"landing_page_url":"https://doi.org/10.1177/003754979907200303","pdf_url":null,"source":{"id":"https://openalex.org/S32573412","display_name":"SIMULATION","issn_l":"0037-5497","issn":["0037-5497","1741-3133"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","dongbi-d","jufo-1","norway-1","poland-70","russia-white-list-2"],"host_organization":"https://openalex.org/P4310320017","host_organization_name":"SAGE Publishing","host_organization_lineage":["https://openalex.org/P4310320017"],"host_organization_lineage_names":["SAGE Publishing"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SIMULATION","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042818169","display_name":"Gregory D. Peterson","orcid":"https://orcid.org/0000-0002-0875-5278","observed_orcids":["https://orcid.org/0000-0002-0875-5278"]},"institutions":[{"id":"https://openalex.org/I4210152413","display_name":"FTL Systems (United States)","ror":"https://ror.org/04ehcx813","country_code":"US","type":"company","lineage":["https://openalex.org/I4210152413"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gregory D. Peterson","raw_affiliation_strings":["FTL Systems, Inc., 1620 Greenview Drive SW, Rochester, Minnesota, 55902"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FTL Systems, Inc., 1620 Greenview Drive SW, Rochester, Minnesota, 55902","institution_ids":["https://openalex.org/I4210152413"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020052190","display_name":"John C. Willis","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I4210152413","display_name":"FTL Systems (United States)","ror":"https://ror.org/04ehcx813","country_code":"US","type":"company","lineage":["https://openalex.org/I4210152413"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John C. Willis","raw_affiliation_strings":["FTL Systems, Inc., 1620 Greenview Drive SW, Rochester, Minnesota, 55902"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FTL Systems, Inc., 1620 Greenview Drive SW, Rochester, Minnesota, 55902","institution_ids":["https://openalex.org/I4210152413"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210152413"],"apc_list":{"value":4150,"currency":"USD","value_usd":4150},"apc_paid":null,"fwci":2.3514,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.89842754,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"72","issue":"3","first_page":"148","last_page":"148"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5151000022888184,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5151000022888184,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13286","display_name":"Modeling and Simulation Systems","score":0.1453000009059906,"subfield":{"id":"https://openalex.org/subfields/2611","display_name":"Modeling and Simulation"},"field":{"id":"https://openalex.org/fields/26","display_name":"Mathematics"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.11980000138282776,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hardware-description-languages","display_name":"hardware description languages","score":0.9430000185966492},{"id":"https://openalex.org/keywords/hardware-simulation","display_name":"hardware simulation","score":0.6729999780654907},{"id":"https://openalex.org/keywords/parallel-simulation","display_name":"parallel simulation","score":0.9649999737739563},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.9580000042915344},{"id":"https://openalex.org/keywords/vhdl-ams","display_name":"VHDL-AMS","score":0.9879999756813049},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":1.0}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6949560642242432},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.4401071071624756},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.42330414056777954},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35131391882896423}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1177/003754979907200303","doi":"https://doi.org/10.1177/003754979907200303","is_oa":false,"landing_page_url":"https://doi.org/10.1177/003754979907200303","pdf_url":null,"source":{"id":"https://openalex.org/S32573412","display_name":"SIMULATION","issn_l":"0037-5497","issn":["0037-5497","1741-3133"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["anvur-scientific","cwts-core","dongbi-d","jufo-1","norway-1","poland-70","russia-white-list-2"],"host_organization":"https://openalex.org/P4310320017","host_organization_name":"SAGE Publishing","host_organization_lineage":["https://openalex.org/P4310320017"],"host_organization_lineage_names":["SAGE Publishing"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SIMULATION","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1509997287","https://openalex.org/W1517105504","https://openalex.org/W1565967564","https://openalex.org/W1578046190","https://openalex.org/W1987553023","https://openalex.org/W2075943092","https://openalex.org/W2077837716","https://openalex.org/W2089867526","https://openalex.org/W2096666271","https://openalex.org/W2096955477","https://openalex.org/W2097241618","https://openalex.org/W2103178316","https://openalex.org/W2108167744","https://openalex.org/W2113679017","https://openalex.org/W2114903322","https://openalex.org/W2118900647","https://openalex.org/W2123018268","https://openalex.org/W2123548401","https://openalex.org/W2123990187","https://openalex.org/W2146317466","https://openalex.org/W2149904967","https://openalex.org/W2159159598","https://openalex.org/W2167789806","https://openalex.org/W2296636214","https://openalex.org/W4240190739"],"related_works":["https://openalex.org/W7099305150","https://openalex.org/W2161846790","https://openalex.org/W6941381985","https://openalex.org/W7095757365","https://openalex.org/W2539742022","https://openalex.org/W72547090","https://openalex.org/W7101088502","https://openalex.org/W1506077218","https://openalex.org/W2597103399","https://openalex.org/W2747272645"],"abstract_inverted_index":{"Keywords":[0],"Parallel":[1],"simulation,":[2],"hardware":[3],"description":[4],"languages,":[5],"design":[6],"automation":[7],"standards,":[8],"VHDL,":[9],"VHDL-AMS,":[10],"Verilog":[11]},"counts_by_year":[],"updated_date":"2026-11-04T10:54:05.112534","created_date":"2017-05-12T00:00:00"}