{"id":"https://openalex.org/W2599764483","doi":"https://doi.org/10.1016/j.mejo.2017.02.003","title":"Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI","display_name":"Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI","publication_year":2017,"publication_date":"2017-03-21","ids":{"openalex":"https://openalex.org/W2599764483","doi":"https://doi.org/10.1016/j.mejo.2017.02.003","mag":"2599764483"},"language":"en","primary_location":{"id":"doi:10.1016/j.mejo.2017.02.003","doi":"https://doi.org/10.1016/j.mejo.2017.02.003","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.mejo.2017.02.003","pdf_url":null,"source":{"id":"https://openalex.org/S4394736632","display_name":"Microelectronics Journal","issn_l":"0026-2692","issn":["0026-2692"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","ki-jl-1","poland-70"],"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Journal","raw_type":"journal-article"},"volume":null,"type":"article","is_traditional":true,"indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090428081","display_name":"J. Jeba Johannah","orcid":"https://orcid.org/0000-0002-2449-3183","observed_orcids":["https://orcid.org/0000-0002-2449-3183"]},"institutions":[{"id":"https://openalex.org/I4387154592","display_name":"St. Joseph\u2019s College of Engineering","ror":"https://ror.org/01g3pby21","country_code":"IN","type":"education","lineage":["https://openalex.org/I4387154592"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"J. Jeba Johannah","raw_affiliation_strings":["Department of ECE, St. Joseph's College of Engineering, Chennai 600119, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, St. Joseph's College of Engineering, Chennai 600119, India","institution_ids":["https://openalex.org/I4387154592"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026461824","display_name":"Reeba Korah","orcid":"https://orcid.org/0000-0003-1661-5037","observed_orcids":["https://orcid.org/0000-0003-1661-5037"]},"institutions":[{"id":"https://openalex.org/I144614875","display_name":"Alliance University","ror":"https://ror.org/03f4gsr42","country_code":"IN","type":"education","lineage":["https://openalex.org/I144614875"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Reeba Korah","raw_affiliation_strings":["Department of ECE, Alliance College of Engineering and design, Bangalore 652106, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, Alliance College of Engineering and design, Bangalore 652106, India","institution_ids":["https://openalex.org/I144614875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108696760","display_name":"G. Maria Kalavathy","orcid":"https://orcid.org/0000-0002-1826-8166","observed_orcids":["https://orcid.org/0000-0002-1826-8166"]},"institutions":[{"id":"https://openalex.org/I4387154592","display_name":"St. Joseph\u2019s College of Engineering","ror":"https://ror.org/01g3pby21","country_code":"IN","type":"education","lineage":["https://openalex.org/I4387154592"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Maria Kalavathy","raw_affiliation_strings":["Department of CSE, St.Joseph's College of Engineering, Chennai 600119, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of CSE, St.Joseph's College of Engineering, Chennai 600119, India","institution_ids":["https://openalex.org/I4387154592"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5107872046","display_name":"Sivanandham","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sivanandham","raw_affiliation_strings":["Department of ECE, Vellore Institute of Technology, Vellore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, Vellore Institute of Technology, Vellore, India","institution_ids":["https://openalex.org/I876193797"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5090428081"],"corresponding_institution_ids":["https://openalex.org/I4387154592"],"apc_list":null,"apc_paid":null,"fwci":0.7808,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.70663024,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":88,"max":98},"biblio":{"volume":"62","issue":null,"first_page":"137","last_page":"145"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.0003000000142492354,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":9.999999747378752e-05,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-gating","display_name":"power gating","score":0.8830000162124634},{"id":"https://openalex.org/keywords/leakage-power-reduction","display_name":"leakage power reduction","score":0.7689999938011169},{"id":"https://openalex.org/keywords/dynamic-power-reduction","display_name":"dynamic power reduction","score":0.6570000052452087},{"id":"https://openalex.org/keywords/static-power-consumption","display_name":"static power consumption","score":0.6190000176429749},{"id":"https://openalex.org/keywords/sleep-transistor","display_name":"sleep transistor","score":0.8190000057220459},{"id":"https://openalex.org/keywords/voltage-scaling","display_name":"voltage scaling","score":0.6710000038146973},{"id":"https://openalex.org/keywords/deep-submicron-cmos","display_name":"deep submicron CMOS","score":0.8159999847412109},{"id":"https://openalex.org/keywords/ripple-carry-adder","display_name":"ripple carry adder","score":0.7900000214576721},{"id":"https://openalex.org/keywords/low-power-vlsi-circuits","display_name":"low-power VLSI circuits","score":0.6140000224113464},{"id":"https://openalex.org/keywords/delay-degradation","display_name":"delay degradation","score":0.45100000500679016}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7625546455383301},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6164312958717346},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.5803200006484985},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5796592831611633},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.5674598217010498},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5553907155990601},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5288711190223694},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.49076685309410095},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.4904000759124756},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.47716134786605835},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4687725901603699},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.46479907631874084},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4600391983985901},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4568506181240082},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4319908618927002},{"id":"https://openalex.org/C2777796570","wikidata":"https://www.wikidata.org/wiki/Q2351326","display_name":"Dynamic logic (digital electronics)","level":4,"score":0.42775923013687134},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41071611642837524},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3967483937740326},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.31326282024383545},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3011733293533325},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.1863883137702942},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/j.mejo.2017.02.003","doi":"https://doi.org/10.1016/j.mejo.2017.02.003","is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.mejo.2017.02.003","pdf_url":null,"source":{"id":"https://openalex.org/S4394736632","display_name":"Microelectronics Journal","issn_l":"0026-2692","issn":["0026-2692"],"is_oa":false,"is_in_doaj":false,"is_core":true,"listed_in":["cwts-core","ki-jl-1","poland-70"],"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microelectronics Journal","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5378999710083008,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1963680138","https://openalex.org/W1983067779","https://openalex.org/W1991507700","https://openalex.org/W2005361138","https://openalex.org/W2029663117","https://openalex.org/W2046103068","https://openalex.org/W2065771407","https://openalex.org/W2076469371","https://openalex.org/W2083626899","https://openalex.org/W2086775835","https://openalex.org/W2108049334","https://openalex.org/W2114621701","https://openalex.org/W2119985366","https://openalex.org/W2122846829","https://openalex.org/W2124278579","https://openalex.org/W2138968074","https://openalex.org/W2145071646","https://openalex.org/W2150450196","https://openalex.org/W2157555699","https://openalex.org/W2169578282","https://openalex.org/W2170191597","https://openalex.org/W2170619886","https://openalex.org/W6613709920","https://openalex.org/W6662173471","https://openalex.org/W6677814527"],"related_works":["https://openalex.org/W3135068662","https://openalex.org/W2122719544","https://openalex.org/W181289602","https://openalex.org/W1979180831","https://openalex.org/W7099245525","https://openalex.org/W2324305405","https://openalex.org/W1991727477","https://openalex.org/W2318173114","https://openalex.org/W2981645555","https://openalex.org/W3215842912"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4}],"updated_date":"2026-11-13T13:42:25.865203","created_date":"2017-04-07T00:00:00"}
